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Commit 7c4ff3b3 authored by Kyle Yan's avatar Kyle Yan Committed by Gerrit - the friendly Code Review server
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Merge "iommu/io-pgtable-arm: Use non-cacheable page table memory" into msm-4.8

parents 0bc0964b d5bb2da0

drivers/iommu/io-pgtable-arm.c

+2 −2
Original line number Diff line number Diff line
@@ -930,8 +930,8 @@ arm_64_lpae_alloc_pgtable_s1(struct io_pgtable_cfg *cfg, void *cookie) 


	/* TCR */

	reg = (ARM_LPAE_TCR_SH_IS << ARM_LPAE_TCR_SH0_SHIFT) |

	      (ARM_LPAE_TCR_RGN_WBWA << ARM_LPAE_TCR_IRGN0_SHIFT) |

	      (ARM_LPAE_TCR_RGN_WBWA << ARM_LPAE_TCR_ORGN0_SHIFT);

	      (ARM_LPAE_TCR_RGN_NC << ARM_LPAE_TCR_IRGN0_SHIFT) |

	      (ARM_LPAE_TCR_RGN_NC << ARM_LPAE_TCR_ORGN0_SHIFT);



	switch (ARM_LPAE_GRANULE(data)) {

	case SZ_4K: