Loading arch/x86/include/asm/suspend_32.h +2 −0 Original line number Diff line number Diff line Loading @@ -15,6 +15,8 @@ static inline int arch_prepare_suspend(void) { return 0; } struct saved_context { u16 es, fs, gs, ss; unsigned long cr0, cr2, cr3, cr4; u64 misc_enable; bool misc_enable_saved; struct desc_ptr gdt; struct desc_ptr idt; u16 ldt; Loading arch/x86/include/asm/suspend_64.h +2 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,8 @@ struct saved_context { u16 ds, es, fs, gs, ss; unsigned long gs_base, gs_kernel_base, fs_base; unsigned long cr0, cr2, cr3, cr4, cr8; u64 misc_enable; bool misc_enable_saved; unsigned long efer; u16 gdt_pad; u16 gdt_limit; Loading arch/x86/power/cpu.c +4 −0 Original line number Diff line number Diff line Loading @@ -105,6 +105,8 @@ static void __save_processor_state(struct saved_context *ctxt) ctxt->cr4 = read_cr4(); ctxt->cr8 = read_cr8(); #endif ctxt->misc_enable_saved = !rdmsrl_safe(MSR_IA32_MISC_ENABLE, &ctxt->misc_enable); } /* Needed by apm.c */ Loading Loading @@ -152,6 +154,8 @@ static void fix_processor_context(void) */ static void __restore_processor_state(struct saved_context *ctxt) { if (ctxt->misc_enable_saved) wrmsrl(MSR_IA32_MISC_ENABLE, ctxt->misc_enable); /* * control registers */ Loading Loading
arch/x86/include/asm/suspend_32.h +2 −0 Original line number Diff line number Diff line Loading @@ -15,6 +15,8 @@ static inline int arch_prepare_suspend(void) { return 0; } struct saved_context { u16 es, fs, gs, ss; unsigned long cr0, cr2, cr3, cr4; u64 misc_enable; bool misc_enable_saved; struct desc_ptr gdt; struct desc_ptr idt; u16 ldt; Loading
arch/x86/include/asm/suspend_64.h +2 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,8 @@ struct saved_context { u16 ds, es, fs, gs, ss; unsigned long gs_base, gs_kernel_base, fs_base; unsigned long cr0, cr2, cr3, cr4, cr8; u64 misc_enable; bool misc_enable_saved; unsigned long efer; u16 gdt_pad; u16 gdt_limit; Loading
arch/x86/power/cpu.c +4 −0 Original line number Diff line number Diff line Loading @@ -105,6 +105,8 @@ static void __save_processor_state(struct saved_context *ctxt) ctxt->cr4 = read_cr4(); ctxt->cr8 = read_cr8(); #endif ctxt->misc_enable_saved = !rdmsrl_safe(MSR_IA32_MISC_ENABLE, &ctxt->misc_enable); } /* Needed by apm.c */ Loading Loading @@ -152,6 +154,8 @@ static void fix_processor_context(void) */ static void __restore_processor_state(struct saved_context *ctxt) { if (ctxt->misc_enable_saved) wrmsrl(MSR_IA32_MISC_ENABLE, ctxt->misc_enable); /* * control registers */ Loading