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Commit 6997f8c2 authored by Kyle Yan's avatar Kyle Yan Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: switch to RPMh controlled clocks for sdm845" into msm-4.9

parents c47374c7 abbbfcbc

arch/arm64/boot/dts/qcom/sdm845.dtsi

+13 −5
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 
#include <dt-bindings/clock/qcom,gpucc-sdm845.h>

#include <dt-bindings/clock/qcom,videocc-sdm845.h>

#include <dt-bindings/clock/qcom,cpucc-sdm845.h>

#include <dt-bindings/clock/qcom,rpmh.h>

#include <dt-bindings/regulator/qcom,rpmh-regulator.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/soc/qcom,tcs-mbox.h>
@@ -538,6 +539,13 @@ 
		#reset-cells = <1>;

	};



	clock_rpmh: qcom,rpmhclk {

		compatible = "qcom,rpmh-clk-sdm845";

		#clock-cells = <1>;

		mboxes = <&apps_rsc 0>;

		mbox-names = "apps";

	};



	ufsphy_mem: ufsphy_mem@1d87000 {

		reg = <0x1d87000 0xda8>; /* PHY regs */

		reg-names = "phy_mem";
@@ -714,7 +722,7 @@ 
		reg-names = "qdsp6_base", "halt_q6", "halt_modem",

			    "halt_nc", "rmb_base", "restart_reg";



		clocks = <&clock_gcc RPMH_CXO_CLK>,

		clocks = <&clock_rpmh RPMH_CXO_CLK>,

			 <&clock_gcc GCC_MSS_CFG_AHB_CLK>,

			 <&clock_gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,

			 <&clock_gcc GCC_BOOT_ROM_AHB_CLK>,
@@ -764,7 +772,7 @@ 
		qcom,proxy-reg-names = "vdd_cx";

		qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;



		clocks = <&clock_gcc RPMH_CXO_CLK>;

		clocks = <&clock_rpmh RPMH_CXO_CLK>;

		clock-names = "xo";

		qcom,proxy-clock-names = "xo";
@@ -798,7 +806,7 @@ 
		qcom,proxy-reg-names = "vdd_cx", "vdd_px";

		qcom,keep-proxy-regs-on;



		clocks = <&clock_gcc RPMH_CXO_CLK>;

		clocks = <&clock_rpmh RPMH_CXO_CLK>;

		clock-names = "xo";

		qcom,proxy-clock-names = "xo";
@@ -859,7 +867,7 @@ 
		vdd_mx-supply = <&pm8998_s6_level>;

		vdd_mx-uV = <RPMH_REGULATOR_LEVEL_TURBO 100000>;



		clocks = <&clock_gcc RPMH_CXO_CLK>;

		clocks = <&clock_rpmh RPMH_CXO_CLK>;

		clock-names = "xo";

		qcom,proxy-clock-names = "xo";

		qcom,pil-generic-irq-handler;
@@ -892,7 +900,7 @@ 
		qcom,proxy-reg-names = "vdd_cx";

		qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;



		clocks = <&clock_gcc RPMH_CXO_CLK>;

		clocks = <&clock_rpmh RPMH_CXO_CLK>;

		clock-names = "xo";

		qcom,proxy-clock-names = "xo";

include/dt-bindings/clock/qcom,gcc-sdm845.h

+0 −6
Original line number Diff line number Diff line
@@ -200,12 +200,6 @@ 
#define GPLL1							182

#define GPLL1_OUT_MAIN						183



/* RPMh controlled clocks */

#define RPMH_CXO_CLK						0

#define RPMH_CXO_A_CLK						1

#define RPMH_QDSS_CLK						2

#define RPMH_QDSS_A_CLK						3



/* GCC reset clocks */

#define GCC_GPU_BCR						0

#define GCC_MMSS_BCR						1