Loading drivers/clk/qcom/gcc-sdm845.c +1 −21 Original line number Diff line number Diff line Loading @@ -150,14 +150,6 @@ static const char * const gcc_parent_names_6[] = { "core_bi_pll_test_se", }; static struct clk_dummy bi_tcxo = { .rrate = 19200000, .hw.init = &(struct clk_init_data){ .name = "bi_tcxo", .ops = &clk_dummy_ops, }, }; static struct pll_vco fabia_vco[] = { { 250000000, 2000000000, 0 }, { 125000000, 1000000000, 1 }, Loading Loading @@ -3202,10 +3194,6 @@ static struct clk_branch gcc_video_xo_clk = { }, }; struct clk_hw *gcc_sdm845_hws[] = { [GCC_XO] = &bi_tcxo.hw, }; static struct clk_regmap *gcc_sdm845_clocks[] = { [GCC_AGGRE_NOC_PCIE_TBU_CLK] = &gcc_aggre_noc_pcie_tbu_clk.clkr, [GCC_AGGRE_UFS_CARD_AXI_CLK] = &gcc_aggre_ufs_card_axi_clk.clkr, Loading Loading @@ -3447,21 +3435,13 @@ MODULE_DEVICE_TABLE(of, gcc_sdm845_match_table); static int gcc_sdm845_probe(struct platform_device *pdev) { struct clk *clk; struct regmap *regmap; int ret = 0, i; int ret = 0; regmap = qcom_cc_map(pdev, &gcc_sdm845_desc); if (IS_ERR(regmap)) return PTR_ERR(regmap); /* register hardware clocks */ for (i = 0; i < ARRAY_SIZE(gcc_sdm845_hws); i++) { clk = devm_clk_register(&pdev->dev, gcc_sdm845_hws[i]); if (IS_ERR(clk)) return PTR_ERR(clk); } /* * Set the CPUSS_AHB_CLK_SLEEP_ENA bit to allow the cpuss_ahb_clk to be * turned off by hardware during certain apps low power modes. Loading include/dt-bindings/clock/qcom,gcc-sdm845.h +0 −3 Original line number Diff line number Diff line Loading @@ -14,9 +14,6 @@ #ifndef _DT_BINDINGS_CLK_MSM_GCC_SDM845_H #define _DT_BINDINGS_CLK_MSM_GCC_SDM845_H /* Hardware/Dummy/Voter clocks */ #define GCC_XO 0 /* GCC clock registers */ #define GCC_AGGRE_NOC_PCIE_TBU_CLK 0 #define GCC_AGGRE_UFS_CARD_AXI_CLK 1 Loading Loading
drivers/clk/qcom/gcc-sdm845.c +1 −21 Original line number Diff line number Diff line Loading @@ -150,14 +150,6 @@ static const char * const gcc_parent_names_6[] = { "core_bi_pll_test_se", }; static struct clk_dummy bi_tcxo = { .rrate = 19200000, .hw.init = &(struct clk_init_data){ .name = "bi_tcxo", .ops = &clk_dummy_ops, }, }; static struct pll_vco fabia_vco[] = { { 250000000, 2000000000, 0 }, { 125000000, 1000000000, 1 }, Loading Loading @@ -3202,10 +3194,6 @@ static struct clk_branch gcc_video_xo_clk = { }, }; struct clk_hw *gcc_sdm845_hws[] = { [GCC_XO] = &bi_tcxo.hw, }; static struct clk_regmap *gcc_sdm845_clocks[] = { [GCC_AGGRE_NOC_PCIE_TBU_CLK] = &gcc_aggre_noc_pcie_tbu_clk.clkr, [GCC_AGGRE_UFS_CARD_AXI_CLK] = &gcc_aggre_ufs_card_axi_clk.clkr, Loading Loading @@ -3447,21 +3435,13 @@ MODULE_DEVICE_TABLE(of, gcc_sdm845_match_table); static int gcc_sdm845_probe(struct platform_device *pdev) { struct clk *clk; struct regmap *regmap; int ret = 0, i; int ret = 0; regmap = qcom_cc_map(pdev, &gcc_sdm845_desc); if (IS_ERR(regmap)) return PTR_ERR(regmap); /* register hardware clocks */ for (i = 0; i < ARRAY_SIZE(gcc_sdm845_hws); i++) { clk = devm_clk_register(&pdev->dev, gcc_sdm845_hws[i]); if (IS_ERR(clk)) return PTR_ERR(clk); } /* * Set the CPUSS_AHB_CLK_SLEEP_ENA bit to allow the cpuss_ahb_clk to be * turned off by hardware during certain apps low power modes. Loading
include/dt-bindings/clock/qcom,gcc-sdm845.h +0 −3 Original line number Diff line number Diff line Loading @@ -14,9 +14,6 @@ #ifndef _DT_BINDINGS_CLK_MSM_GCC_SDM845_H #define _DT_BINDINGS_CLK_MSM_GCC_SDM845_H /* Hardware/Dummy/Voter clocks */ #define GCC_XO 0 /* GCC clock registers */ #define GCC_AGGRE_NOC_PCIE_TBU_CLK 0 #define GCC_AGGRE_UFS_CARD_AXI_CLK 1 Loading