Loading Documentation/devicetree/bindings/usb/msm-phy.txt +2 −1 Original line number Diff line number Diff line Loading @@ -191,7 +191,8 @@ Example: 0x210 /* QUSB2PHY_PWR_CTRL1 */ 0x230 /* QUSB2PHY_INTR_CTRL */ 0x0a8 /* QUSB2PHY_PLL_CORE_INPUT_OVERRIDE */ 0x254>; /* QUSB2PHY_TEST1 */ 0x254 /* QUSB2PHY_TEST1 */ 0x198>; /* QUSB2PHY_PLL_BIAS_CONTROL_2 */ qcom,efuse-bit-pos = <21>; qcom,efuse-num-bits = <3>; Loading arch/arm64/boot/dts/qcom/sdm845-usb.dtsi +4 −2 Original line number Diff line number Diff line Loading @@ -133,7 +133,8 @@ 0x210 /* QUSB2PHY_PWR_CTRL1 */ 0x230 /* QUSB2PHY_INTR_CTRL */ 0x0a8 /* QUSB2PHY_PLL_CORE_INPUT_OVERRIDE */ 0x254>; /* QUSB2PHY_TEST1 */ 0x254 /* QUSB2PHY_TEST1 */ 0x198>; /* PLL_BIAS_CONTROL_2 */ qcom,qusb-phy-init-seq = /* <value reg_offset> */ Loading Loading @@ -408,7 +409,8 @@ 0x210 /* QUSB2PHY_PWR_CTRL1 */ 0x230 /* QUSB2PHY_INTR_CTRL */ 0x0a8 /* QUSB2PHY_PLL_CORE_INPUT_OVERRIDE */ 0x254>; /* QUSB2PHY_TEST1 */ 0x254 /* QUSB2PHY_TEST1 */ 0x198>; /* PLL_BIAS_CONTROL_2 */ qcom,qusb-phy-init-seq = /* <value reg_offset> */ Loading drivers/usb/phy/phy-msm-qusb-v2.c +2 −1 Original line number Diff line number Diff line Loading @@ -74,6 +74,7 @@ enum qusb_phy_reg { INTR_CTRL, PLL_CORE_INPUT_OVERRIDE, TEST1, BIAS_CTRL_2, USB2_PHY_REG_MAX, }; Loading Loading @@ -892,7 +893,7 @@ static int qusb_phy_probe(struct platform_device *pdev) if (qphy->phy_reg) { qphy->qusb_phy_reg_offset_cnt = size / sizeof(*qphy->phy_reg); if (qphy->qusb_phy_reg_offset_cnt > USB2_PHY_REG_MAX) { if (qphy->qusb_phy_reg_offset_cnt != USB2_PHY_REG_MAX) { dev_err(dev, "invalid reg offset count\n"); return -EINVAL; } Loading Loading
Documentation/devicetree/bindings/usb/msm-phy.txt +2 −1 Original line number Diff line number Diff line Loading @@ -191,7 +191,8 @@ Example: 0x210 /* QUSB2PHY_PWR_CTRL1 */ 0x230 /* QUSB2PHY_INTR_CTRL */ 0x0a8 /* QUSB2PHY_PLL_CORE_INPUT_OVERRIDE */ 0x254>; /* QUSB2PHY_TEST1 */ 0x254 /* QUSB2PHY_TEST1 */ 0x198>; /* QUSB2PHY_PLL_BIAS_CONTROL_2 */ qcom,efuse-bit-pos = <21>; qcom,efuse-num-bits = <3>; Loading
arch/arm64/boot/dts/qcom/sdm845-usb.dtsi +4 −2 Original line number Diff line number Diff line Loading @@ -133,7 +133,8 @@ 0x210 /* QUSB2PHY_PWR_CTRL1 */ 0x230 /* QUSB2PHY_INTR_CTRL */ 0x0a8 /* QUSB2PHY_PLL_CORE_INPUT_OVERRIDE */ 0x254>; /* QUSB2PHY_TEST1 */ 0x254 /* QUSB2PHY_TEST1 */ 0x198>; /* PLL_BIAS_CONTROL_2 */ qcom,qusb-phy-init-seq = /* <value reg_offset> */ Loading Loading @@ -408,7 +409,8 @@ 0x210 /* QUSB2PHY_PWR_CTRL1 */ 0x230 /* QUSB2PHY_INTR_CTRL */ 0x0a8 /* QUSB2PHY_PLL_CORE_INPUT_OVERRIDE */ 0x254>; /* QUSB2PHY_TEST1 */ 0x254 /* QUSB2PHY_TEST1 */ 0x198>; /* PLL_BIAS_CONTROL_2 */ qcom,qusb-phy-init-seq = /* <value reg_offset> */ Loading
drivers/usb/phy/phy-msm-qusb-v2.c +2 −1 Original line number Diff line number Diff line Loading @@ -74,6 +74,7 @@ enum qusb_phy_reg { INTR_CTRL, PLL_CORE_INPUT_OVERRIDE, TEST1, BIAS_CTRL_2, USB2_PHY_REG_MAX, }; Loading Loading @@ -892,7 +893,7 @@ static int qusb_phy_probe(struct platform_device *pdev) if (qphy->phy_reg) { qphy->qusb_phy_reg_offset_cnt = size / sizeof(*qphy->phy_reg); if (qphy->qusb_phy_reg_offset_cnt > USB2_PHY_REG_MAX) { if (qphy->qusb_phy_reg_offset_cnt != USB2_PHY_REG_MAX) { dev_err(dev, "invalid reg offset count\n"); return -EINVAL; } Loading