Loading arch/arm/include/asm/kvm_mmu.h +10 −0 Original line number Diff line number Diff line Loading @@ -223,6 +223,16 @@ static inline unsigned int kvm_get_vmid_bits(void) return 8; } static inline void *kvm_get_hyp_vector(void) { return kvm_ksym_ref(__kvm_hyp_vector); } static inline int kvm_map_vectors(void) { return 0; } #endif /* !__ASSEMBLY__ */ #endif /* __ARM_KVM_MMU_H__ */ arch/arm64/Kconfig +16 −0 Original line number Diff line number Diff line Loading @@ -793,6 +793,22 @@ config UNMAP_KERNEL_AT_EL0 If unsure, say Y. config HARDEN_BRANCH_PREDICTOR bool "Harden the branch predictor against aliasing attacks" if EXPERT help Speculation attacks against some high-performance processors rely on being able to manipulate the branch predictor for a victim context by executing aliasing branches in the attacker context. Such attacks can be partially mitigated against by clearing internal branch predictor state and limiting the prediction logic in some situations. This config option will take CPU-specific actions to harden the branch predictor against aliasing attacks and may rely on specific instruction sequences or control bits being set by the system firmware. If unsure, say Y. menuconfig ARMV8_DEPRECATED bool "Emulate deprecated/obsolete ARMv8 instructions" depends on COMPAT Loading arch/arm64/configs/sdm845-perf_defconfig +1 −0 Original line number Diff line number Diff line Loading @@ -64,6 +64,7 @@ CONFIG_CMA=y CONFIG_ZSMALLOC=y CONFIG_BALANCE_ANON_FILE_RECLAIM=y CONFIG_SECCOMP=y CONFIG_HARDEN_BRANCH_PREDICTOR=y CONFIG_ARMV8_DEPRECATED=y CONFIG_SWP_EMULATION=y CONFIG_CP15_BARRIER_EMULATION=y Loading arch/arm64/configs/sdm845_defconfig +1 −0 Original line number Diff line number Diff line Loading @@ -68,6 +68,7 @@ CONFIG_CMA_DEBUGFS=y CONFIG_ZSMALLOC=y CONFIG_BALANCE_ANON_FILE_RECLAIM=y CONFIG_SECCOMP=y CONFIG_HARDEN_BRANCH_PREDICTOR=y CONFIG_ARMV8_DEPRECATED=y CONFIG_SWP_EMULATION=y CONFIG_CP15_BARRIER_EMULATION=y Loading arch/arm64/include/asm/assembler.h +0 −13 Original line number Diff line number Diff line Loading @@ -452,17 +452,4 @@ alternative_endif mrs \rd, sp_el0 .endm /* * Errata workaround post TTBRx_EL1 update. */ .macro post_ttbr_update_workaround #ifdef CONFIG_CAVIUM_ERRATUM_27456 alternative_if ARM64_WORKAROUND_CAVIUM_27456 ic iallu dsb nsh isb alternative_else_nop_endif #endif .endm #endif /* __ASM_ASSEMBLER_H */ Loading
arch/arm/include/asm/kvm_mmu.h +10 −0 Original line number Diff line number Diff line Loading @@ -223,6 +223,16 @@ static inline unsigned int kvm_get_vmid_bits(void) return 8; } static inline void *kvm_get_hyp_vector(void) { return kvm_ksym_ref(__kvm_hyp_vector); } static inline int kvm_map_vectors(void) { return 0; } #endif /* !__ASSEMBLY__ */ #endif /* __ARM_KVM_MMU_H__ */
arch/arm64/Kconfig +16 −0 Original line number Diff line number Diff line Loading @@ -793,6 +793,22 @@ config UNMAP_KERNEL_AT_EL0 If unsure, say Y. config HARDEN_BRANCH_PREDICTOR bool "Harden the branch predictor against aliasing attacks" if EXPERT help Speculation attacks against some high-performance processors rely on being able to manipulate the branch predictor for a victim context by executing aliasing branches in the attacker context. Such attacks can be partially mitigated against by clearing internal branch predictor state and limiting the prediction logic in some situations. This config option will take CPU-specific actions to harden the branch predictor against aliasing attacks and may rely on specific instruction sequences or control bits being set by the system firmware. If unsure, say Y. menuconfig ARMV8_DEPRECATED bool "Emulate deprecated/obsolete ARMv8 instructions" depends on COMPAT Loading
arch/arm64/configs/sdm845-perf_defconfig +1 −0 Original line number Diff line number Diff line Loading @@ -64,6 +64,7 @@ CONFIG_CMA=y CONFIG_ZSMALLOC=y CONFIG_BALANCE_ANON_FILE_RECLAIM=y CONFIG_SECCOMP=y CONFIG_HARDEN_BRANCH_PREDICTOR=y CONFIG_ARMV8_DEPRECATED=y CONFIG_SWP_EMULATION=y CONFIG_CP15_BARRIER_EMULATION=y Loading
arch/arm64/configs/sdm845_defconfig +1 −0 Original line number Diff line number Diff line Loading @@ -68,6 +68,7 @@ CONFIG_CMA_DEBUGFS=y CONFIG_ZSMALLOC=y CONFIG_BALANCE_ANON_FILE_RECLAIM=y CONFIG_SECCOMP=y CONFIG_HARDEN_BRANCH_PREDICTOR=y CONFIG_ARMV8_DEPRECATED=y CONFIG_SWP_EMULATION=y CONFIG_CP15_BARRIER_EMULATION=y Loading
arch/arm64/include/asm/assembler.h +0 −13 Original line number Diff line number Diff line Loading @@ -452,17 +452,4 @@ alternative_endif mrs \rd, sp_el0 .endm /* * Errata workaround post TTBRx_EL1 update. */ .macro post_ttbr_update_workaround #ifdef CONFIG_CAVIUM_ERRATUM_27456 alternative_if ARM64_WORKAROUND_CAVIUM_27456 ic iallu dsb nsh isb alternative_else_nop_endif #endif .endm #endif /* __ASM_ASSEMBLER_H */