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Commit 5df5d01d authored Jul 01, 2012 by Roland Stigge

ARM: LPC32xx: Init MMC via clock



This patch moves MMC/SD controller initialization from the board specific file
phy3250.c to clock.c.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>

parent df072717

arch/arm/mach-lpc32xx/clock.c

+4 −2

Original line number	Diff line number	Diff line
		@@ -812,11 +812,13 @@ static int mmc_onoff_enable(struct clk *clk, int enable)
		u32 tmp;

		tmp = __raw_readl(LPC32XX_CLKPWR_MS_CTRL) &
		~LPC32XX_CLKPWR_MSCARD_SDCARD_EN;
		~(LPC32XX_CLKPWR_MSCARD_SDCARD_EN \|
		LPC32XX_CLKPWR_MSCARD_MSDIO_PU_EN);

		/* If rate is 0, disable clock */
		if (enable != 0)
		tmp \|= LPC32XX_CLKPWR_MSCARD_SDCARD_EN;
		tmp \|= LPC32XX_CLKPWR_MSCARD_SDCARD_EN \|
		LPC32XX_CLKPWR_MSCARD_MSDIO_PU_EN;

		__raw_writel(tmp, LPC32XX_CLKPWR_MS_CTRL);

arch/arm/mach-lpc32xx/phy3250.c

+0 −5

Original line number	Diff line number	Diff line
		@@ -262,11 +262,6 @@ static void __init lpc3250_machine_init(void)

		lpc32xx_serial_init();

		tmp = __raw_readl(LPC32XX_CLKPWR_MS_CTRL);
		tmp \|= LPC32XX_CLKPWR_MSCARD_SDCARD_EN \|
		LPC32XX_CLKPWR_MSCARD_MSDIO_PU_EN;
		__raw_writel(tmp, LPC32XX_CLKPWR_MS_CTRL);

		/* Test clock needed for UDA1380 initial init */
		__raw_writel(LPC32XX_CLKPWR_TESTCLK2_SEL_MOSC \|
		LPC32XX_CLKPWR_TESTCLK_TESTCLK2_EN,