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Commit 53570cbc authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'amlogic-drivers-2' of... 

Merge tag 'amlogic-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/late

Pull "Amlogic driver updates for v4.9, 2nd round" from Kevin Hilman:

- media: update IR support for newer SoCs
- firmware: add secure monitor driver
- net: new stmmac glue driver
- usb: udd DWC2 support for meson-gxbb
- clocks: expose more clock IDs for use by DT
- DT binding updates

* tag 'amlogic-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (21 commits)
  clk: gxbb: expose i2c clocks
  clk: gxbb: expose USB clocks
  clk: gxbb: expose spifc clock
  clk: gxbb: expose MPLL2 clock for use by DT
  Documentation: dt-bindings: Add documentation for the Meson USB2 PHYs
  usb: dwc2: add support for Meson8b and GXBB SoCs
  net: stmmac: update the module description of the dwmac-meson driver
  net: stmmac: add a glue driver for the Amlogic Meson 8b / GXBB DWMAC
  stmmac: introduce get_stmmac_bsp_priv() helper
  net: dt-bindings: Document the new Meson8b and GXBB DWMAC bindings
  clk: meson-gxbb: Export PWM related clocks for DT
  meson: clk: Add support for clock gates
  gxbb: clk: Adjust MESON_GATE macro to be shared with meson8b
  clk: meson: Copy meson8b CLKID defines to private header file
  meson: clk: Rename register names according to Amlogic datasheet
  meson: clk: Move register definitions to meson8b.h
  clk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention
  nvmem: amlogic: Add Amlogic Meson EFUSE driver
  firmware: Amlogic: Add secure monitor driver
  media: rc: meson-ir: Add support for newer versions of the IR decoder
  ...
parents bac6dd36 dfdd7d4a

Documentation/devicetree/bindings/net/meson-dwmac.txt

+37 −8
Original line number Diff line number Diff line 
* Amlogic Meson DWMAC Ethernet controller



The device inherits all the properties of the dwmac/stmmac devices

described in the file net/stmmac.txt with the following changes.

described in the file stmmac.txt in the current directory with the

following changes.



Required properties:

Required properties on all platforms:



- compatible: should be "amlogic,meson6-dwmac" along with "snps,dwmac"

	      and any applicable more detailed version number

	      described in net/stmmac.txt

- compatible:	Depending on the platform this should be one of:

			- "amlogic,meson6-dwmac"

			- "amlogic,meson8b-dwmac"

			- "amlogic,meson-gxbb-dwmac"

		Additionally "snps,dwmac" and any applicable more

		detailed version number described in net/stmmac.txt

		should be used.



- reg: should contain a register range for the dwmac controller and

       another one for the Amlogic specific configuration

- reg:	The first register range should be the one of the DWMAC

	controller. The second range is is for the Amlogic specific

	configuration (for example the PRG_ETHERNET register range

	on Meson8b and newer)



Example:

Required properties on Meson8b and newer:

- clock-names:	Should contain the following:

		- "stmmaceth" - see stmmac.txt

		- "clkin0" - first parent clock of the internal mux

		- "clkin1" - second parent clock of the internal mux





Example for Meson6:



	ethmac: ethernet@c9410000 {

		compatible = "amlogic,meson6-dwmac", "snps,dwmac";
@@ -23,3 +37,18 @@ Example: 
		clocks = <&clk81>;

		clock-names = "stmmaceth";

	}



Example for GXBB:

	ethmac: ethernet@c9410000 {

		compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac";

		reg = <0x0 0xc9410000 0x0 0x10000>,

			<0x0 0xc8834540 0x0 0x8>;

		interrupts = <0 8 1>;

		interrupt-names = "macirq";

		clocks = <&clkc CLKID_ETH>,

				<&clkc CLKID_FCLK_DIV2>,

				<&clkc CLKID_MPLL2>;

		clock-names = "stmmaceth", "clkin0", "clkin1";

		phy-mode = "rgmii";

		status = "disabled";

	};

Documentation/devicetree/bindings/phy/meson-usb2-phy.txt

0 → 100644
+27 −0
Original line number Diff line number Diff line 
* Amlogic USB2 PHY



Required properties:

- compatible:	Depending on the platform this should be one of:

	"amlogic,meson8b-usb2-phy"

	"amlogic,meson-gxbb-usb2-phy"

- reg:		The base address and length of the registers

- #phys-cells:	should be 0 (see phy-bindings.txt in this directory)

- clocks:	phandle and clock identifier for the phy clocks

- clock-names:	"usb_general" and "usb"



Optional properties:

- resets:	reference to the reset controller

- phy-supply:	see phy-bindings.txt in this directory





Example:



usb0_phy: usb_phy@0 {

	compatible = "amlogic,meson-gxbb-usb2-phy";

	#phy-cells = <0>;

	reg = <0x0 0x0 0x0 0x20>;

	resets = <&reset RESET_USB_OTG>;

	clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;

	clock-names = "usb_general", "usb";

	phy-supply = <&usb_vbus>;

};

Documentation/devicetree/bindings/usb/dwc2.txt

+2 −0
Original line number Diff line number Diff line
@@ -10,6 +10,8 @@ Required properties: 
  - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;

  - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;

  - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs;

  - "amlogic,meson8b-usb": The DWC2 USB controller instance in Amlogic Meson8b SoCs;

  - "amlogic,meson-gxbb-usb": The DWC2 USB controller instance in Amlogic S905 SoCs;

  - snps,dwc2: A generic DWC2 USB controller with default parameters.

- reg : Should contain 1 register range (address and length)

- interrupts : Should contain 1 interrupt

drivers/clk/meson/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -3,5 +3,5 @@ 
#



obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-pll.o clk-cpu.o clk-mpll.o

obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b-clkc.o

obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b.o

obj-$(CONFIG_COMMON_CLK_GXBB)	 += gxbb.o gxbb-aoclk.o

drivers/clk/meson/clkc.h

+1 −1
Original line number Diff line number Diff line
@@ -98,7 +98,7 @@ struct meson_clk_mpll { 
};



#define MESON_GATE(_name, _reg, _bit)					\

struct clk_gate gxbb_##_name = { 						\

struct clk_gate _name = { 						\

	.reg = (void __iomem *) _reg, 					\

	.bit_idx = (_bit), 						\

	.lock = &clk_lock,						\