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Commit bac6dd36 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'integrator-armsoc-1' of... 

Merge tag 'integrator-armsoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/late

Pull "This is a bunch of Integrator changes for v4.9" Linus Walleij:

- Add and fix a bunch of clocks in the DTS corresponding
  to the new clock support merged into the clk tree.
- Move the CLCD display configuration from boardfile to
  device tree using the new CLCD support merged into the
  fbdev tree.
- Cut some auxdata.
- Cut some static remappings.
- Move the sched_clock() counter to use syscon+regmap.

* tag 'integrator-armsoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: integrator: read counter using syscon/regmap
  ARM: integrator: cut down on static maps
  ARM: integrator: delete some auxdata
  ARM: integrator: move CP CLCD display to DTS
  ARM: dts: add the core module clocks to Integrator/CP
  ARM: dts: Add the core module clocks to Integrator/AP
  ARM: dts: add the Integrator/AP baseboard clocks
  ARM: dts: set the 24MHz xtal as parent of the UART clock
parents da9070b3 bdb249fc

arch/arm/boot/dts/integratorap.dts

+50 −1
Original line number Diff line number Diff line
@@ -19,7 +19,7 @@ 
		bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk";

	};



	/* 24 MHz chrystal on the core module */

	/* 24 MHz chrystal on the Integrator/AP development board */

	xtal24mhz: xtal24mhz@24M {

		#clock-cells = <0>;

		compatible = "fixed-clock";
@@ -39,6 +39,34 @@ 
		#clock-cells = <0>;

		compatible = "fixed-clock";

		clock-frequency = <14745600>;

		clocks = <&xtal24mhz>;

	};



	core-module@10000000 {

		/* 24 MHz chrystal on the core module */

		cm24mhz: cm24mhz@24M {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <24000000>;

		};



		/* Oscillator on the core module, clocks the CPU core */

		cmosc: cmosc@24M {

			compatible = "arm,syscon-icst525-integratorap-cm";

			#clock-cells = <0>;

			lock-offset = <0x14>;

			vco-offset = <0x08>;

			clocks = <&cm24mhz>;

		};



		/* Auxilary oscillator on the core module, 32.369MHz at boot */

		auxosc: auxosc@24M {

			compatible = "arm,syscon-icst525";

			#clock-cells = <0>;

			lock-offset = <0x14>;

			vco-offset = <0x1c>;

			clocks = <&cm24mhz>;

		};

	};



	syscon {
@@ -47,6 +75,27 @@ 
		interrupt-parent = <&pic>;

		/* These are the logical module IRQs */

		interrupts = <9>, <10>, <11>, <12>;



		/*

		 * SYSCLK clocks PCIv3 bridge, system controller and the

		 * logic modules.

		 */

		sysclk: apsys@24M {

			compatible = "arm,syscon-icst525-integratorap-sys";

			#clock-cells = <0>;

			lock-offset = <0x1c>;

			vco-offset = <0x04>;

			clocks = <&xtal24mhz>;

		};



		/* One-bit control for the PCI bus clock (33 or 25 MHz) */

		pciclk: pciclk@24M {

			compatible = "arm,syscon-icst525-integratorap-pci";

			#clock-cells = <0>;

			lock-offset = <0x1c>;

			vco-offset = <0x04>;

			clocks = <&xtal24mhz>;

		};

	};



	timer0: timer@13000000 {

arch/arm/boot/dts/integratorcp.dts

+63 −11
Original line number Diff line number Diff line
@@ -58,20 +58,37 @@ 


	core-module@10000000 {

		/* 24 MHz chrystal on the core module */

		xtal24mhz: xtal24mhz@24M {

		cm24mhz: cm24mhz@24M {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <24000000>;

		};



		/*

		 * External oscillator on the core module, usually used

		 * to drive video circuitry. Driven from the 24MHz clock.

		 */

		auxosc: cm_aux_osc@25M {

		/* Oscillator on the core module, clocks the CPU core */

		cmcore: cmosc@24M {

			compatible = "arm,syscon-icst525-integratorcp-cm-core";

			#clock-cells = <0>;

			lock-offset = <0x14>;

			vco-offset = <0x08>;

			clocks = <&cm24mhz>;

		};



		/* Oscillator on the core module, clocks the memory bus */

		cmmem: cmosc@24M {

			compatible = "arm,syscon-icst525-integratorcp-cm-mem";

			#clock-cells = <0>;

			compatible = "arm,integrator-cm-auxosc";

			clocks = <&xtal24mhz>;

			lock-offset = <0x14>;

			vco-offset = <0x08>;

			clocks = <&cm24mhz>;

		};



		/* Auxilary oscillator on the core module, clocks the CLCD */

		auxosc: auxosc@24M {

			compatible = "arm,syscon-icst525";

			#clock-cells = <0>;

			lock-offset = <0x14>;

			vco-offset = <0x1c>;

			clocks = <&cm24mhz>;

		};



		/* The KMI clock is the 24 MHz oscillator divided to 8MHz */
@@ -80,7 +97,7 @@ 
			compatible = "fixed-factor-clock";

			clock-div = <3>;

			clock-mult = <1>;

			clocks = <&xtal24mhz>;

			clocks = <&cm24mhz>;

		};



		/* The timer clock is the 24 MHz oscillator divided to 1MHz */
@@ -89,7 +106,7 @@ 
			compatible = "fixed-factor-clock";

			clock-div = <24>;

			clock-mult = <1>;

			clocks = <&xtal24mhz>;

			clocks = <&cm24mhz>;

		};

	};
@@ -209,7 +226,42 @@ 
			reg = <0xC0000000 0x1000>;

			interrupts = <22>;

			clocks = <&auxosc>, <&pclk>;

			clock-names = "clcd", "apb_pclk";

			clock-names = "clcdclk", "apb_pclk";



			port {

				/*

				 * The VGA connected is implemented with a

				 * THS8134A triple DAC that can be run in 24bit

				 * or 16bit RGB mode.

				 */

				clcd_pads: endpoint {

					remote-endpoint = <&clcd_panel>;

					arm,pl11x,tft-r0g0b0-pads = <1 7 13>;

				};

			};



			panel {

				compatible = "panel-dpi";



				port {

					clcd_panel: endpoint {

						remote-endpoint = <&clcd_pads>;

					};

				};



				/* Standard 640x480 VGA timings */

				panel-timing {

					clock-frequency = <25175000>;

					hactive = <640>;

					hback-porch = <48>;

					hfront-porch = <16>;

					hsync-len = <96>;

					vactive = <480>;

					vback-porch = <33>;

					vfront-porch = <10>;

					vsync-len = <2>;

				};

			};

		};

	};

};

arch/arm/mach-integrator/integrator_ap.c

+0 −36
Original line number Diff line number Diff line
@@ -17,33 +17,19 @@ 
 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

 */

#include <linux/types.h>

#include <linux/kernel.h>

#include <linux/init.h>

#include <linux/list.h>

#include <linux/platform_device.h>

#include <linux/slab.h>

#include <linux/string.h>

#include <linux/syscore_ops.h>

#include <linux/amba/bus.h>

#include <linux/amba/kmi.h>

#include <linux/io.h>

#include <linux/irqchip.h>

#include <linux/platform_data/clk-integrator.h>

#include <linux/of_irq.h>

#include <linux/of_address.h>

#include <linux/of_platform.h>

#include <linux/stat.h>

#include <linux/termios.h>



#include <asm/setup.h>

#include <asm/param.h>		/* HZ */

#include <asm/mach-types.h>



#include <asm/mach/arch.h>

#include <asm/mach/irq.h>

#include <asm/mach/map.h>

#include <asm/mach/time.h>



#include "hardware.h"

#include "cm.h"
@@ -68,14 +54,8 @@ static void __iomem *ebi_base; 


/*

 * Logical      Physical

 * ef000000			Cache flush

 * f1100000	11000000	System controller registers

 * f1300000	13000000	Counter/Timer

 * f1400000	14000000	Interrupt controller

 * f1600000	16000000	UART 0

 * f1700000	17000000	UART 1

 * f1a00000	1a000000	Debug LEDs

 * f1b00000	1b000000	GPIO

 */



static struct map_desc ap_io_desc[] __initdata __maybe_unused = {
@@ -89,16 +69,6 @@ static struct map_desc ap_io_desc[] __initdata __maybe_unused = { 
		.pfn		= __phys_to_pfn(INTEGRATOR_UART0_BASE),

		.length		= SZ_4K,

		.type		= MT_DEVICE

	}, {

		.virtual	= IO_ADDRESS(INTEGRATOR_DBG_BASE),

		.pfn		= __phys_to_pfn(INTEGRATOR_DBG_BASE),

		.length		= SZ_4K,

		.type		= MT_DEVICE

	}, {

		.virtual	= IO_ADDRESS(INTEGRATOR_AP_GPIO_BASE),

		.pfn		= __phys_to_pfn(INTEGRATOR_AP_GPIO_BASE),

		.length		= SZ_4K,

		.type		= MT_DEVICE

	}

};
@@ -196,16 +166,10 @@ static void __init ap_init_irq_of(void) 


/* For the Device Tree, add in the UART callbacks as AUXDATA */

static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = {

	OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,

		"rtc", NULL),

	OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,

		"uart0", &ap_uart_data),

	OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,

		"uart1", &ap_uart_data),

	OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,

		"kmi0", NULL),

	OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,

		"kmi1", NULL),

	{ /* sentinel */ },

};

arch/arm/mach-integrator/integrator_cp.c

+13 −110
Original line number Diff line number Diff line
@@ -7,67 +7,40 @@ 
 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License.

 */

#include <linux/types.h>

#include <linux/kernel.h>

#include <linux/init.h>

#include <linux/list.h>

#include <linux/platform_device.h>

#include <linux/dma-mapping.h>

#include <linux/string.h>

#include <linux/device.h>

#include <linux/amba/bus.h>

#include <linux/amba/kmi.h>

#include <linux/amba/clcd.h>

#include <linux/platform_data/video-clcd-versatile.h>

#include <linux/amba/mmci.h>

#include <linux/io.h>

#include <linux/irqchip.h>

#include <linux/gfp.h>

#include <linux/of_irq.h>

#include <linux/of_address.h>

#include <linux/of_platform.h>

#include <linux/sched_clock.h>

#include <linux/regmap.h>

#include <linux/mfd/syscon.h>



#include <asm/setup.h>

#include <asm/mach-types.h>

#include <asm/mach/arch.h>

#include <asm/mach/irq.h>

#include <asm/mach/map.h>

#include <asm/mach/time.h>



#include "hardware.h"

#include "cm.h"

#include "common.h"



/* Base address to the core module header */

static struct regmap *cm_map;

/* Base address to the CP controller */

static void __iomem *intcp_con_base;



#define INTCP_PA_CLCD_BASE		0xc0000000

#define CM_COUNTER_OFFSET 0x28



/*

 * Logical      Physical

 * f1000000	10000000	Core module registers

 * f1300000	13000000	Counter/Timer

 * f1400000	14000000	Interrupt controller

 * f1600000	16000000	UART 0

 * f1700000	17000000	UART 1

 * f1a00000	1a000000	Debug LEDs

 * fc900000	c9000000	GPIO

 * fca00000	ca000000	SIC

 */



static struct map_desc intcp_io_desc[] __initdata __maybe_unused = {

	{

		.virtual	= IO_ADDRESS(INTEGRATOR_HDR_BASE),

		.pfn		= __phys_to_pfn(INTEGRATOR_HDR_BASE),

		.length		= SZ_4K,

		.type		= MT_DEVICE

	}, {

		.virtual	= IO_ADDRESS(INTEGRATOR_CT_BASE),

		.pfn		= __phys_to_pfn(INTEGRATOR_CT_BASE),

		.length		= SZ_4K,

		.type		= MT_DEVICE

	}, {

		.virtual	= IO_ADDRESS(INTEGRATOR_IC_BASE),

		.pfn		= __phys_to_pfn(INTEGRATOR_IC_BASE),

		.length		= SZ_4K,
@@ -77,16 +50,6 @@ static struct map_desc intcp_io_desc[] __initdata __maybe_unused = { 
		.pfn		= __phys_to_pfn(INTEGRATOR_UART0_BASE),

		.length		= SZ_4K,

		.type		= MT_DEVICE

	}, {

		.virtual	= IO_ADDRESS(INTEGRATOR_DBG_BASE),

		.pfn		= __phys_to_pfn(INTEGRATOR_DBG_BASE),

		.length		= SZ_4K,

		.type		= MT_DEVICE

	}, {

		.virtual	= IO_ADDRESS(INTEGRATOR_CP_GPIO_BASE),

		.pfn		= __phys_to_pfn(INTEGRATOR_CP_GPIO_BASE),

		.length		= SZ_4K,

		.type		= MT_DEVICE

	}, {

		.virtual	= IO_ADDRESS(INTEGRATOR_CP_SIC_BASE),

		.pfn		= __phys_to_pfn(INTEGRATOR_CP_SIC_BASE),
@@ -121,66 +84,20 @@ static struct mmci_platform_data mmc_data = { 
	.gpio_cd	= -1,

};



/*

 * CLCD support

 */

/*

 * Ensure VGA is selected.

 */

static void cp_clcd_enable(struct clcd_fb *fb)

{

	struct fb_var_screeninfo *var = &fb->fb.var;

	u32 val = CM_CTRL_STATIC1 | CM_CTRL_STATIC2

			| CM_CTRL_LCDEN0 | CM_CTRL_LCDEN1;



	if (var->bits_per_pixel <= 8 ||

	    (var->bits_per_pixel == 16 && var->green.length == 5))

		/* Pseudocolor, RGB555, BGR555 */

		val |= CM_CTRL_LCDMUXSEL_VGA555_TFT555;

	else if (fb->fb.var.bits_per_pixel <= 16)

		/* truecolor RGB565 */

		val |= CM_CTRL_LCDMUXSEL_VGA565_TFT555;

	else

		val = 0; /* no idea for this, don't trust the docs */



	cm_control(CM_CTRL_LCDMUXSEL_MASK|

		   CM_CTRL_LCDEN0|

		   CM_CTRL_LCDEN1|

		   CM_CTRL_STATIC1|

		   CM_CTRL_STATIC2|

		   CM_CTRL_STATIC|

		   CM_CTRL_n24BITEN, val);

}



static int cp_clcd_setup(struct clcd_fb *fb)

{

	fb->panel = versatile_clcd_get_panel("VGA");

	if (!fb->panel)

		return -EINVAL;



	return versatile_clcd_setup_dma(fb, SZ_1M);

}



static struct clcd_board clcd_data = {

	.name		= "Integrator/CP",

	.caps		= CLCD_CAP_5551 | CLCD_CAP_RGB565 | CLCD_CAP_888,

	.check		= clcdfb_check,

	.decode		= clcdfb_decode,

	.enable		= cp_clcd_enable,

	.setup		= cp_clcd_setup,

	.mmap		= versatile_clcd_mmap_dma,

	.remove		= versatile_clcd_remove_dma,

};



#define REFCOUNTER (__io_address(INTEGRATOR_HDR_BASE) + 0x28)



static u64 notrace intcp_read_sched_clock(void)

{

	return readl(REFCOUNTER);

	unsigned int val;



	/* MMIO so discard return code */

	regmap_read(cm_map, CM_COUNTER_OFFSET, &val);

	return val;

}



static void __init intcp_init_early(void)

{

	cm_map = syscon_regmap_lookup_by_compatible("arm,core-module-integrator");

	if (IS_ERR(cm_map))

		return;

	sched_clock_register(intcp_read_sched_clock, 32, 24000000);

}
@@ -195,22 +112,8 @@ static void __init intcp_init_irq_of(void) 
 * and enforce the bus names since these are used for clock lookups.

 */

static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = {

	OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,

		"rtc", NULL),

	OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,

		"uart0", NULL),

	OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,

		"uart1", NULL),

	OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,

		"kmi0", NULL),

	OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,

		"kmi1", NULL),

	OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_CP_MMC_BASE,

		"mmci", &mmc_data),

	OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_CP_AACI_BASE,

		"aaci", &mmc_data),

	OF_DEV_AUXDATA("arm,primecell", INTCP_PA_CLCD_BASE,

		"clcd", &clcd_data),

	{ /* sentinel */ },

};