Merge "ARM: dts: msm: update PCIe clock frequencies for SDM845" (4dc124e0) · Commits · e / devices / android_kernel_fairphone_FP3

arch/arm64/boot/dts/qcom/sdm845-pcie.dtsi

+2 −2

Original line number	Diff line number	Diff line
		@@ -259,7 +259,7 @@
		"pcie_tbu_clk", "pcie_phy_refgen_clk",
		"pcie_phy_aux_clk";

		max-clock-frequency-hz = <0>, <0>, <19200000>, <0>, <0>,
		max-clock-frequency-hz = <0>, <0>, <19200000>, <0>, <0>, <0>,
		<0>, <0>, <0>, <0>, <100000000>, <0>;

		resets = <&clock_gcc GCC_PCIE_0_BCR>,
		@@ -595,7 +595,7 @@
		"pcie_tbu_clk", "pcie_phy_refgen_clk",
		"pcie_phy_aux_clk";

		max-clock-frequency-hz = <0>, <0>, <19200000>, <0>, <0>,
		max-clock-frequency-hz = <0>, <0>, <19200000>, <0>, <0>, <0>,
		<0>, <0>, <0>, <0>, <100000000>, <0>;

		resets = <&clock_gcc GCC_PCIE_1_BCR>,