Loading Documentation/devicetree/bindings/iio/adc/qcom-rradc.txt +4 −0 Original line number Diff line number Diff line Loading @@ -45,6 +45,10 @@ Optional property: - qcom,pmic-revid : Phandle pointing to the revision peripheral node. Use it to query the PMIC fabrication ID for applying the appropriate temperature compensation parameters. - qcom,batt-id-delay-ms : Value type: <u32> Definition: Used to specify HW settling time in MS for measuring BATT_ID. Possible values are: 0, 1, 4, 12, 20, 40, 60, 80. Example: /* RRADC node */ Loading arch/arm64/boot/dts/qcom/sdm429w-pm660.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -534,6 +534,7 @@ #size-cells = <0>; #io-channel-cells = <1>; qcom,pmic-revid = <&pm660_revid>; qcom,batt-id-delay-ms = <80>; }; pm660_fg: qpnp,fg { Loading drivers/iio/adc/qcom-rradc.c +27 −7 Original line number Diff line number Diff line Loading @@ -199,7 +199,8 @@ #define FG_RR_TP_REV_VERSION2 29 #define FG_RR_TP_REV_VERSION3 32 #define BATT_ID_SETTLE_DELAY_80_MS 0xE0 #define BATT_ID_SETTLE_SHIFT 5 #define RRADC_BATT_ID_DELAY_MAX 8 /* * The channel number is not a physical index in hardware, Loading Loading @@ -231,6 +232,7 @@ struct rradc_chip { struct mutex lock; struct regmap *regmap; u16 base; int batt_id_delay; struct iio_chan_spec *iio_chans; unsigned int nchannels; struct rradc_chan_prop *chan_props; Loading Loading @@ -258,6 +260,8 @@ struct rradc_chan_prop { u16 adc_code, int *result); }; static const int batt_id_delays[] = {0, 1, 4, 12, 20, 40, 60, 80}; static int rradc_masked_write(struct rradc_chip *rr_adc, u16 offset, u8 mask, u8 val) { Loading Loading @@ -855,7 +859,7 @@ static int rradc_enable_batt_id_channel(struct rradc_chip *chip, bool enable) static int rradc_do_batt_id_conversion(struct rradc_chip *chip, struct rradc_chan_prop *prop, u16 *data, u8 *buf) { int rc = 0, ret = 0; int rc = 0, ret = 0, batt_id_delay; rc = rradc_enable_batt_id_channel(chip, true); if (rc < 0) { Loading @@ -863,11 +867,12 @@ static int rradc_do_batt_id_conversion(struct rradc_chip *chip, return rc; } if (chip->batt_id_delay != -EINVAL) { batt_id_delay = chip->batt_id_delay << BATT_ID_SETTLE_SHIFT; rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_CFG, BATT_ID_SETTLE_DELAY_80_MS, BATT_ID_SETTLE_DELAY_80_MS); if (rc < 0) { batt_id_delay, batt_id_delay); if (rc < 0) pr_err("BATT_ID settling time config failed:%d\n", rc); ret = rc; } rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_TRIGGER, Loading Loading @@ -1138,6 +1143,21 @@ static int rradc_get_dt_data(struct rradc_chip *chip, struct device_node *node) return rc; } chip->batt_id_delay = -EINVAL; rc = of_property_read_u32(node, "qcom,batt-id-delay-ms", &chip->batt_id_delay); if (!rc) { for (i = 0; i < RRADC_BATT_ID_DELAY_MAX; i++) { if (chip->batt_id_delay == batt_id_delays[i]) break; } if (i == RRADC_BATT_ID_DELAY_MAX) pr_err("Invalid batt_id_delay, rc=%d\n", rc); else chip->batt_id_delay = i; } chip->base = base; chip->revid_dev_node = of_parse_phandle(node, "qcom,pmic-revid", 0); if (chip->revid_dev_node) { Loading Loading
Documentation/devicetree/bindings/iio/adc/qcom-rradc.txt +4 −0 Original line number Diff line number Diff line Loading @@ -45,6 +45,10 @@ Optional property: - qcom,pmic-revid : Phandle pointing to the revision peripheral node. Use it to query the PMIC fabrication ID for applying the appropriate temperature compensation parameters. - qcom,batt-id-delay-ms : Value type: <u32> Definition: Used to specify HW settling time in MS for measuring BATT_ID. Possible values are: 0, 1, 4, 12, 20, 40, 60, 80. Example: /* RRADC node */ Loading
arch/arm64/boot/dts/qcom/sdm429w-pm660.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -534,6 +534,7 @@ #size-cells = <0>; #io-channel-cells = <1>; qcom,pmic-revid = <&pm660_revid>; qcom,batt-id-delay-ms = <80>; }; pm660_fg: qpnp,fg { Loading
drivers/iio/adc/qcom-rradc.c +27 −7 Original line number Diff line number Diff line Loading @@ -199,7 +199,8 @@ #define FG_RR_TP_REV_VERSION2 29 #define FG_RR_TP_REV_VERSION3 32 #define BATT_ID_SETTLE_DELAY_80_MS 0xE0 #define BATT_ID_SETTLE_SHIFT 5 #define RRADC_BATT_ID_DELAY_MAX 8 /* * The channel number is not a physical index in hardware, Loading Loading @@ -231,6 +232,7 @@ struct rradc_chip { struct mutex lock; struct regmap *regmap; u16 base; int batt_id_delay; struct iio_chan_spec *iio_chans; unsigned int nchannels; struct rradc_chan_prop *chan_props; Loading Loading @@ -258,6 +260,8 @@ struct rradc_chan_prop { u16 adc_code, int *result); }; static const int batt_id_delays[] = {0, 1, 4, 12, 20, 40, 60, 80}; static int rradc_masked_write(struct rradc_chip *rr_adc, u16 offset, u8 mask, u8 val) { Loading Loading @@ -855,7 +859,7 @@ static int rradc_enable_batt_id_channel(struct rradc_chip *chip, bool enable) static int rradc_do_batt_id_conversion(struct rradc_chip *chip, struct rradc_chan_prop *prop, u16 *data, u8 *buf) { int rc = 0, ret = 0; int rc = 0, ret = 0, batt_id_delay; rc = rradc_enable_batt_id_channel(chip, true); if (rc < 0) { Loading @@ -863,11 +867,12 @@ static int rradc_do_batt_id_conversion(struct rradc_chip *chip, return rc; } if (chip->batt_id_delay != -EINVAL) { batt_id_delay = chip->batt_id_delay << BATT_ID_SETTLE_SHIFT; rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_CFG, BATT_ID_SETTLE_DELAY_80_MS, BATT_ID_SETTLE_DELAY_80_MS); if (rc < 0) { batt_id_delay, batt_id_delay); if (rc < 0) pr_err("BATT_ID settling time config failed:%d\n", rc); ret = rc; } rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_TRIGGER, Loading Loading @@ -1138,6 +1143,21 @@ static int rradc_get_dt_data(struct rradc_chip *chip, struct device_node *node) return rc; } chip->batt_id_delay = -EINVAL; rc = of_property_read_u32(node, "qcom,batt-id-delay-ms", &chip->batt_id_delay); if (!rc) { for (i = 0; i < RRADC_BATT_ID_DELAY_MAX; i++) { if (chip->batt_id_delay == batt_id_delays[i]) break; } if (i == RRADC_BATT_ID_DELAY_MAX) pr_err("Invalid batt_id_delay, rc=%d\n", rc); else chip->batt_id_delay = i; } chip->base = base; chip->revid_dev_node = of_parse_phandle(node, "qcom,pmic-revid", 0); if (chip->revid_dev_node) { Loading