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Commit 3e0314bb authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Enable sdhc1 and sdhc2 for sdm670 mtp and cdp"

parents 1c11c272 6f83cbf5

arch/arm64/boot/dts/qcom/sdm670-cdp.dtsi

+34 −0
Original line number Diff line number Diff line
@@ -60,3 +60,37 @@ 
&qupv3_se6_4uart {

	status = "disabled";

};



&sdhc_1 {

	vdd-supply = <&pm660l_l4>;

	qcom,vdd-voltage-level = <2960000 2960000>;

	qcom,vdd-current-level = <200 570000>;



	vdd-io-supply = <&pm660_l8>;

	qcom,vdd-io-always-on;

	qcom,vdd-io-lpm-sup;

	qcom,vdd-io-voltage-level = <1800000 1800000>;

	qcom,vdd-io-current-level = <200 325000>;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc1_clk_on  &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;

	pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;



	status = "ok";

};



&sdhc_2 {

	vdd-supply = <&pm660l_l5>;

	qcom,vdd-voltage-level = <2960000 2960000>;

	qcom,vdd-current-level = <200 800000>;



	vdd-io-supply = <&pm660l_l2>;

	qcom,vdd-io-voltage-level = <1800000 2960000>;

	qcom,vdd-io-current-level = <200 22000>;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on &sdc2_data_on>;

	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;



	status = "ok";

};

arch/arm64/boot/dts/qcom/sdm670-mtp.dtsi

+34 −0
Original line number Diff line number Diff line
@@ -60,3 +60,37 @@ 
&qupv3_se6_4uart {

	status = "disabled";

};



&sdhc_1 {

	vdd-supply = <&pm660l_l4>;

	qcom,vdd-voltage-level = <2960000 2960000>;

	qcom,vdd-current-level = <200 570000>;



	vdd-io-supply = <&pm660_l8>;

	qcom,vdd-io-always-on;

	qcom,vdd-io-lpm-sup;

	qcom,vdd-io-voltage-level = <1800000 1800000>;

	qcom,vdd-io-current-level = <200 325000>;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc1_clk_on  &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;

	pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;



	status = "ok";

};



&sdhc_2 {

	vdd-supply = <&pm660l_l5>;

	qcom,vdd-voltage-level = <2960000 2960000>;

	qcom,vdd-current-level = <200 800000>;



	vdd-io-supply = <&pm660l_l2>;

	qcom,vdd-io-voltage-level = <1800000 2960000>;

	qcom,vdd-io-current-level = <200 22000>;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on &sdc2_data_on>;

	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;



	status = "ok";

};

arch/arm64/boot/dts/qcom/sdm670-pinctrl.dtsi

+14 −0
Original line number Diff line number Diff line
@@ -1196,6 +1196,20 @@ 
			};

		};



		sdc1_rclk_on: sdc1_rclk_on {

			config {

				pins = "sdc1_rclk";

				bias-pull-down; /* pull down */

			};

		};



		sdc1_rclk_off: sdc1_rclk_off {

			config {

				pins = "sdc1_rclk";

				bias-pull-down; /* pull down */

			};

		};



		sdc2_clk_on: sdc2_clk_on {

			config {

				pins = "sdc2_clk";

arch/arm64/boot/dts/qcom/sdm670-rumi.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -127,6 +127,8 @@ 
	qcom,clk-rates = <400000 20000000 25000000 50000000>;

	qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";



	/delete-property/qcom,devfreq,freq-table;



	status = "ok";

};
@@ -146,6 +148,8 @@ 
	qcom,clk-rates = <400000 20000000 25000000 50000000>;

	qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50";



	/delete-property/qcom,devfreq,freq-table;



	status = "ok";

};

arch/arm64/boot/dts/qcom/sdm670.dtsi

+12 −0
Original line number Diff line number Diff line
@@ -1960,6 +1960,12 @@ 
		qcom,bus-width = <8>;

		qcom,large-address-bus;



		qcom,clk-rates = <400000 20000000 25000000 50000000 100000000

						192000000 384000000>;

		qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";



		qcom,devfreq,freq-table = <50000000 200000000>;



		clocks = <&clock_gcc GCC_SDCC1_AHB_CLK>,

			<&clock_gcc GCC_SDCC1_APPS_CLK>;

		clock-names = "iface_clk", "core_clk";
@@ -1981,6 +1987,12 @@ 
		qcom,bus-width = <4>;

		qcom,large-address-bus;



		qcom,clk-rates = <400000 20000000 25000000

					50000000 100000000 201500000>;

		qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50",

				      "SDR104";



		qcom,devfreq,freq-table = <50000000 201500000>;

		clocks = <&clock_gcc GCC_SDCC2_AHB_CLK>,

			<&clock_gcc GCC_SDCC2_APPS_CLK>;

		clock-names = "iface_clk", "core_clk";