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Commit 380e04ac authored by Stephen Warren's avatar Stephen Warren
Browse files

ARM: tegra: define DT bindings for and instantiate RTC 



The Tegra RTC maintains seconds and milliseconds counters, and five alarm
registers. The alarms and other interrupts may wake the system from
low-power state.

Define a DT binding for this HW module, and add the module into the Tegra
device tree files.

Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent 2f2b7fb2

Documentation/devicetree/bindings/rtc/nvidia,tegra20-rtc.txt

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NVIDIA Tegra20 real-time clock



The Tegra RTC maintains seconds and milliseconds counters, and five alarm

registers. The alarms and other interrupts may wake the system from low-power

state.



Required properties:



- compatible : should be "nvidia,tegra20-rtc".

- reg : Specifies base physical address and size of the registers.

- interrupts : A single interrupt specifier.



Example:



timer {

	compatible = "nvidia,tegra20-rtc";

	reg = <0x7000e000 0x100>;

	interrupts = <0 2 0x04>;

};

arch/arm/boot/dts/tegra20.dtsi

+6 −0
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@@ -234,6 +234,12 @@ 
		#pwm-cells = <2>;

	};



	rtc {

		compatible = "nvidia,tegra20-rtc";

		reg = <0x7000e000 0x100>;

		interrupts = <0 2 0x04>;

	};



	i2c@7000c000 {

		compatible = "nvidia,tegra20-i2c";

		reg = <0x7000c000 0x100>;

arch/arm/boot/dts/tegra30.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -230,6 +230,12 @@ 
		#pwm-cells = <2>;

	};



	rtc {

		compatible = "nvidia,tegra30-rtc", "nvidia,tegra20-rtc";

		reg = <0x7000e000 0x100>;

		interrupts = <0 2 0x04>;

	};



	i2c@7000c000 {

		compatible =  "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";

		reg = <0x7000c000 0x100>;