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Commit 362adebb authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "cnss2: Fill more MHI context fields during registration"

parents 040b327f 36e40309

drivers/net/wireless/cnss2/Kconfig

+10 −0
Original line number Diff line number Diff line
@@ -16,6 +16,16 @@ config CNSS2_DEBUG 
	  features, enabling kernel panic for certain cases to aid the

	  debugging, and enabling any other debug mechanisms.



config CNSS2_QMI

	bool "CNSS2 Platform Driver QMI support"

	depends on CNSS2

	---help---

	  CNSS2 platform driver uses QMI framework to communicate with WLAN

	  firmware. It sends and receives boot handshake messages to WLAN

	  firmware, which includes hardware and software capabilities and

	  configurations. It also sends WLAN on/off control message to

	  firmware over QMI channel.



config CNSS_ASYNC

	bool "Enable/disable CNSS platform driver asynchronous probe"

	depends on CNSS2

drivers/net/wireless/cnss2/Makefile

+1 −2
Original line number Diff line number Diff line
@@ -5,5 +5,4 @@ cnss2-y += bus.o 
cnss2-y += debug.o

cnss2-y += pci.o

cnss2-y += power.o

cnss2-y += qmi.o

cnss2-y += wlan_firmware_service_v01.o
 
cnss2-$(CONFIG_CNSS2_QMI) += qmi.o wlan_firmware_service_v01.o

drivers/net/wireless/cnss2/debug.c

+0 −4
Original line number Diff line number Diff line
@@ -306,10 +306,6 @@ static ssize_t cnss_reg_read_debug_write(struct file *fp, 
	if (kstrtou32(token, 0, &data_len))

		return -EINVAL;



	if (data_len == 0 ||

	    data_len > QMI_WLFW_MAX_ATHDIAG_DATA_SIZE_V01)

		return -EINVAL;



	mutex_lock(&plat_priv->dev_lock);

	kfree(plat_priv->diag_reg_read_buf);

	plat_priv->diag_reg_read_buf = NULL;

drivers/net/wireless/cnss2/main.c

+12 −63
Original line number Diff line number Diff line
@@ -248,8 +248,6 @@ int cnss_wlan_enable(struct device *dev, 
		     const char *host_version)

{

	struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);

	struct wlfw_wlan_cfg_req_msg_v01 req;

	u32 i;

	int ret = 0;



	if (plat_priv->device_id == QCA6174_DEVICE_ID)
@@ -269,48 +267,7 @@ int cnss_wlan_enable(struct device *dev, 
	if (mode == CNSS_WALTEST || mode == CNSS_CCPM)

		goto skip_cfg;



	memset(&req, 0, sizeof(req));



	req.host_version_valid = 1;

	strlcpy(req.host_version, host_version,

		QMI_WLFW_MAX_STR_LEN_V01 + 1);



	req.tgt_cfg_valid = 1;

	if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)

		req.tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;

	else

		req.tgt_cfg_len = config->num_ce_tgt_cfg;

	for (i = 0; i < req.tgt_cfg_len; i++) {

		req.tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;

		req.tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;

		req.tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;

		req.tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;

		req.tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;

	}



	req.svc_cfg_valid = 1;

	if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)

		req.svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;

	else

		req.svc_cfg_len = config->num_ce_svc_pipe_cfg;

	for (i = 0; i < req.svc_cfg_len; i++) {

		req.svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;

		req.svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;

		req.svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;

	}



	req.shadow_reg_v2_valid = 1;

	if (config->num_shadow_reg_v2_cfg >

	    QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)

		req.shadow_reg_v2_len = QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;

	else

		req.shadow_reg_v2_len = config->num_shadow_reg_v2_cfg;



	memcpy(req.shadow_reg_v2, config->shadow_reg_v2_cfg,

	       sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01)

	       * req.shadow_reg_v2_len);



	ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, &req);

	ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);

	if (ret)

		goto out;
@@ -331,7 +288,7 @@ int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode) 
	if (qmi_bypass)

		return 0;



	return cnss_wlfw_wlan_mode_send_sync(plat_priv, QMI_WLFW_OFF_V01);

	return cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);

}

EXPORT_SYMBOL(cnss_wlan_disable);
@@ -350,13 +307,6 @@ int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type, 
	if (plat_priv->device_id == QCA6174_DEVICE_ID)

		return 0;



	if (!output || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {

		cnss_pr_err("Invalid parameters for athdiag read: output %p, data_len %u\n",

			    output, data_len);

		ret = -EINVAL;

		goto out;

	}



	if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {

		cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",

			    plat_priv->driver_state);
@@ -386,13 +336,6 @@ int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type, 
	if (plat_priv->device_id == QCA6174_DEVICE_ID)

		return 0;



	if (!input || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {

		cnss_pr_err("Invalid parameters for athdiag write: input %p, data_len %u\n",

			    input, data_len);

		ret = -EINVAL;

		goto out;

	}



	if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {

		cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",

			    plat_priv->driver_state);
@@ -491,10 +434,10 @@ static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv) 


	if (enable_waltest) {

		ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,

						    QMI_WLFW_WALTEST_V01);

						    CNSS_WALTEST);

	} else if (test_bit(CNSS_COLD_BOOT_CAL, &plat_priv->driver_state)) {

		ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,

						    QMI_WLFW_CALIBRATION_V01);

						    CNSS_CALIBRATION);

	} else if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||

		   test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {

		ret = cnss_bus_call_driver_probe(plat_priv);
@@ -625,6 +568,12 @@ int cnss_driver_event_post(struct cnss_plat_data *plat_priv, 
	return ret;

}



unsigned int cnss_get_boot_timeout(struct device *dev)

{

	return cnss_get_qmi_timeout();

}

EXPORT_SYMBOL(cnss_get_boot_timeout);



int cnss_power_up(struct device *dev)

{

	int ret = 0;
@@ -647,7 +596,7 @@ int cnss_power_up(struct device *dev) 
	if (plat_priv->device_id == QCA6174_DEVICE_ID)

		goto out;



	timeout = cnss_get_qmi_timeout();

	timeout = cnss_get_boot_timeout(dev);



	reinit_completion(&plat_priv->power_up_complete);

	ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
@@ -1101,7 +1050,7 @@ static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv) 
static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv)

{

	plat_priv->cal_done = true;

	cnss_wlfw_wlan_mode_send_sync(plat_priv, QMI_WLFW_OFF_V01);

	cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);

	cnss_bus_dev_shutdown(plat_priv);

	clear_bit(CNSS_COLD_BOOT_CAL, &plat_priv->driver_state);

drivers/net/wireless/cnss2/main.h

+34 −5
Original line number Diff line number Diff line
@@ -24,6 +24,8 @@ 
#include "qmi.h"



#define MAX_NO_OF_MAC_ADDR		4

#define QMI_WLFW_MAX_TIMESTAMP_LEN	32

#define QMI_WLFW_MAX_NUM_MEM_SEG	32



#define CNSS_EVENT_SYNC   BIT(0)

#define CNSS_EVENT_UNINTERRUPTIBLE BIT(1)
@@ -110,6 +112,33 @@ struct cnss_fw_mem { 
	u32 type;

};



struct wlfw_rf_chip_info {

	u32 chip_id;

	u32 chip_family;

};



struct wlfw_rf_board_info {

	u32 board_id;

};



struct wlfw_soc_info {

	u32 soc_id;

};



struct wlfw_fw_version_info {

	u32 fw_version;

	char fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN + 1];

};



enum cnss_mem_type {

	CNSS_MEM_TYPE_MSA,

	CNSS_MEM_TYPE_DDR,

	CNSS_MEM_BDF,

	CNSS_MEM_M3,

	CNSS_MEM_CAL_V01,

	CNSS_MEM_DPD_V01,

};



enum cnss_fw_dump_type {

	CNSS_FW_IMAGE,

	CNSS_FW_RDDM,
@@ -202,12 +231,12 @@ struct cnss_plat_data { 
	struct qmi_handle *qmi_wlfw_clnt;

	struct work_struct qmi_recv_msg_work;

	struct notifier_block qmi_wlfw_clnt_nb;

	struct wlfw_rf_chip_info_s_v01 chip_info;

	struct wlfw_rf_board_info_s_v01 board_info;

	struct wlfw_soc_info_s_v01 soc_info;

	struct wlfw_fw_version_info_s_v01 fw_version_info;

	struct wlfw_rf_chip_info chip_info;

	struct wlfw_rf_board_info board_info;

	struct wlfw_soc_info soc_info;

	struct wlfw_fw_version_info fw_version_info;

	u32 fw_mem_seg_len;

	struct cnss_fw_mem fw_mem[QMI_WLFW_MAX_NUM_MEM_SEG_V01];

	struct cnss_fw_mem fw_mem[QMI_WLFW_MAX_NUM_MEM_SEG];

	struct cnss_fw_mem m3_mem;

	struct cnss_pin_connect_result pin_result;

	struct dentry *root_dentry;