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Commit 32c5f604 authored by Jeykumar Sankaran's avatar Jeykumar Sankaran Committed by Gerrit - the friendly Code Review server
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drm/msm/sde: fix incorrect layer mixer count 



Not all the SDE layer mixer HW block offsets are valid for a given
target device. All the valid mixer HW block id's need not be
contiguous for a device. This change populates the offset value
as 0 for invalid layer mixer blocks in a non-contiguous scenario.
This helps SDE HW catalog to keep track of actual LM count.

Change-Id: Idd6ec93091355c9c330b042ee0ce847ed4914ac4
Signed-off-by: default avatarJeykumar Sankaran <jsanka@codeaurora.org>
parent cc8c86a2

arch/arm64/boot/dts/qcom/sdm845-sde.dtsi

+1 −2
Original line number Original line Diff line number Diff line
@@ -56,8 +56,7 @@ 
				     0x2600 0x2800>;

				     0x2600 0x2800>;

		qcom,sde-ctl-size = <0xE4>;

		qcom,sde-ctl-size = <0xE4>;





		qcom,sde-mixer-off = <0x45000 0x46000 0x47000

		qcom,sde-mixer-off = <0x45000 0x46000 0x47000 0 0 0x4a000>;

				      0x48000 0x49000 0x4a000>;

		qcom,sde-mixer-size = <0x320>;

		qcom,sde-mixer-size = <0x320>;





		qcom,sde-dspp-top-off = <0x1300>;

		qcom,sde-dspp-top-off = <0x1300>;

drivers/gpu/drm/msm/sde/sde_hw_catalog.c

+13 −6
Original line number Original line Diff line number Diff line
@@ -1326,8 +1326,9 @@ static int sde_mixer_parse_dt(struct device_node *np, 
	u32 off_count, blend_off_count, max_blendstages, lm_pair_mask;

	u32 off_count, blend_off_count, max_blendstages, lm_pair_mask;

	struct sde_lm_cfg *mixer;

	struct sde_lm_cfg *mixer;

	struct sde_lm_sub_blks *sblk;

	struct sde_lm_sub_blks *sblk;

	int pp_count, dspp_count, ds_count;

	int pp_count, dspp_count, ds_count, mixer_count;

	u32 pp_idx, dspp_idx, ds_idx;

	u32 pp_idx, dspp_idx, ds_idx;

	u32 mixer_base;

	struct device_node *snp = NULL;

	struct device_node *snp = NULL;





	if (!sde_cfg) {

	if (!sde_cfg) {
@@ -1349,8 +1350,6 @@ static int sde_mixer_parse_dt(struct device_node *np, 
	if (rc)

	if (rc)

		goto end;

		goto end;





	sde_cfg->mixer_count = off_count;



	rc = _read_dt_entry(np, mixer_prop, ARRAY_SIZE(mixer_prop), prop_count,

	rc = _read_dt_entry(np, mixer_prop, ARRAY_SIZE(mixer_prop), prop_count,

		prop_exists, prop_value);

		prop_exists, prop_value);

	if (rc)

	if (rc)
@@ -1398,8 +1397,14 @@ static int sde_mixer_parse_dt(struct device_node *np, 
	if (rc)

	if (rc)

		goto end;

		goto end;





	for (i = 0, pp_idx = 0, dspp_idx = 0, ds_idx = 0; i < off_count; i++) {

	for (i = 0, mixer_count = 0, pp_idx = 0, dspp_idx = 0,

		mixer = sde_cfg->mixer + i;

			ds_idx = 0; i < off_count; i++) {

		mixer_base = PROP_VALUE_ACCESS(prop_value, MIXER_OFF, i);

		if (!mixer_base)

			continue;



		mixer = sde_cfg->mixer + mixer_count;



		sblk = kzalloc(sizeof(*sblk), GFP_KERNEL);

		sblk = kzalloc(sizeof(*sblk), GFP_KERNEL);

		if (!sblk) {

		if (!sblk) {

			rc = -ENOMEM;

			rc = -ENOMEM;
@@ -1408,7 +1413,7 @@ static int sde_mixer_parse_dt(struct device_node *np, 
		}

		}

		mixer->sblk = sblk;

		mixer->sblk = sblk;





		mixer->base = PROP_VALUE_ACCESS(prop_value, MIXER_OFF, i);

		mixer->base = mixer_base;

		mixer->len = PROP_VALUE_ACCESS(prop_value, MIXER_LEN, 0);

		mixer->len = PROP_VALUE_ACCESS(prop_value, MIXER_LEN, 0);

		mixer->id = LM_0 + i;

		mixer->id = LM_0 + i;

		snprintf(mixer->name, SDE_HW_BLK_NAME_LEN, "lm_%u",

		snprintf(mixer->name, SDE_HW_BLK_NAME_LEN, "lm_%u",
@@ -1452,6 +1457,7 @@ static int sde_mixer_parse_dt(struct device_node *np, 
			mixer->dspp = DSPP_MAX;

			mixer->dspp = DSPP_MAX;

			mixer->ds = DS_MAX;

			mixer->ds = DS_MAX;

		}

		}

		mixer_count++;





		sblk->gc.id = SDE_MIXER_GC;

		sblk->gc.id = SDE_MIXER_GC;

		if (blocks_prop_value && blocks_prop_exists[MIXER_GC_PROP]) {

		if (blocks_prop_value && blocks_prop_exists[MIXER_GC_PROP]) {
@@ -1463,6 +1469,7 @@ static int sde_mixer_parse_dt(struct device_node *np, 
			set_bit(SDE_MIXER_GC, &mixer->features);

			set_bit(SDE_MIXER_GC, &mixer->features);

		}

		}

	}

	}

	sde_cfg->mixer_count = mixer_count;





end:

end:

	kfree(prop_value);

	kfree(prop_value);

drivers/gpu/drm/msm/sde/sde_hw_ctl.c

+6 −4
Original line number Original line Diff line number Diff line
@@ -378,10 +378,12 @@ static void sde_hw_ctl_clear_all_blendstages(struct sde_hw_ctl *ctx) 
	int i;

	int i;





	for (i = 0; i < ctx->mixer_count; i++) {

	for (i = 0; i < ctx->mixer_count; i++) {

		SDE_REG_WRITE(c, CTL_LAYER(LM_0 + i), 0);

		int mixer_id = ctx->mixer_hw_caps[i].id;

		SDE_REG_WRITE(c, CTL_LAYER_EXT(LM_0 + i), 0);



		SDE_REG_WRITE(c, CTL_LAYER_EXT2(LM_0 + i), 0);

		SDE_REG_WRITE(c, CTL_LAYER(mixer_id), 0);

		SDE_REG_WRITE(c, CTL_LAYER_EXT3(LM_0 + i), 0);

		SDE_REG_WRITE(c, CTL_LAYER_EXT(mixer_id), 0);

		SDE_REG_WRITE(c, CTL_LAYER_EXT2(mixer_id), 0);

		SDE_REG_WRITE(c, CTL_LAYER_EXT3(mixer_id), 0);

	}

	}

}

}