Loading drivers/media/platform/msm/camera/cam_cpas/cam_cpas_hw.c +1 −1 Original line number Diff line number Diff line Loading @@ -585,7 +585,7 @@ static int cam_cpas_util_apply_client_axi_vote( if (rc) { CAM_ERR(CAM_CPAS, "Failed camnoc vote ab[%llu] ib[%llu] rc=%d", 0, camnoc_bw, rc); (uint64_t)0, camnoc_bw, rc); goto unlock_axi_port; } } Loading drivers/media/platform/msm/camera/cam_fd/fd_hw_mgr/cam_fd_hw_mgr.c +3 −3 Original line number Diff line number Diff line Loading @@ -402,7 +402,7 @@ static int cam_fd_packet_generic_blob_handler(void *user_data, (struct cam_fd_hw_cmd_prestart_args *)user_data; if (!blob_data || (blob_size == 0)) { CAM_ERR(CAM_FD, "Invalid blob info %pK %d", blob_data, CAM_ERR(CAM_FD, "Invalid blob info %pK %u", blob_data, blob_size); return -EINVAL; } Loading @@ -417,7 +417,7 @@ static int cam_fd_packet_generic_blob_handler(void *user_data, uint32_t *get_raw_results = (uint32_t *)blob_data; if (sizeof(uint32_t) != blob_size) { CAM_ERR(CAM_FD, "Invalid blob size %d %d", CAM_ERR(CAM_FD, "Invalid blob size %lu %u", sizeof(uint32_t), blob_size); return -EINVAL; } Loading @@ -430,7 +430,7 @@ static int cam_fd_packet_generic_blob_handler(void *user_data, (struct cam_fd_soc_clock_bw_request *)blob_data; if (sizeof(struct cam_fd_soc_clock_bw_request) != blob_size) { CAM_ERR(CAM_FD, "Invalid blob size %d %d", CAM_ERR(CAM_FD, "Invalid blob size %lu %u", sizeof(struct cam_fd_soc_clock_bw_request), blob_size); return -EINVAL; Loading drivers/media/platform/msm/camera/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_core.c +7 −7 Original line number Diff line number Diff line Loading @@ -127,7 +127,7 @@ static int cam_fd_hw_util_fdwrapper_sync_reset(struct cam_hw_info *fd_hw) time_left = wait_for_completion_timeout(&fd_core->reset_complete, msecs_to_jiffies(CAM_FD_HW_HALT_RESET_TIMEOUT)); if (time_left <= 0) CAM_WARN(CAM_FD, "HW reset timeout time_left=%d", time_left); CAM_WARN(CAM_FD, "HW reset timeout time_left=%ld", time_left); CAM_DBG(CAM_FD, "FD Wrapper SW Sync Reset complete"); Loading Loading @@ -157,7 +157,7 @@ static int cam_fd_hw_util_fdwrapper_halt(struct cam_hw_info *fd_hw) time_left = wait_for_completion_timeout(&fd_core->halt_complete, msecs_to_jiffies(CAM_FD_HW_HALT_RESET_TIMEOUT)); if (time_left <= 0) CAM_WARN(CAM_FD, "HW halt timeout time_left=%d", time_left); CAM_WARN(CAM_FD, "HW halt timeout time_left=%ld", time_left); CAM_DBG(CAM_FD, "FD Wrapper Halt complete"); Loading Loading @@ -651,7 +651,7 @@ int cam_fd_hw_init(void *hw_priv, void *init_hw_args, uint32_t arg_size) } if (arg_size != sizeof(struct cam_fd_hw_init_args)) { CAM_ERR(CAM_FD, "Invalid arg size %d, %d", arg_size, CAM_ERR(CAM_FD, "Invalid arg size %u, %lu", arg_size, sizeof(struct cam_fd_hw_init_args)); return -EINVAL; } Loading Loading @@ -735,7 +735,7 @@ int cam_fd_hw_deinit(void *hw_priv, void *deinit_hw_args, uint32_t arg_size) } if (arg_size != sizeof(struct cam_fd_hw_deinit_args)) { CAM_ERR(CAM_FD, "Invalid arg size %d, %d", arg_size, CAM_ERR(CAM_FD, "Invalid arg size %u, %lu", arg_size, sizeof(struct cam_fd_hw_deinit_args)); return -EINVAL; } Loading Loading @@ -859,7 +859,7 @@ int cam_fd_hw_start(void *hw_priv, void *hw_start_args, uint32_t arg_size) } if (arg_size != sizeof(struct cam_fd_hw_cmd_start_args)) { CAM_ERR(CAM_FD, "Invalid arg size %d, %d", arg_size, CAM_ERR(CAM_FD, "Invalid arg size %u, %lu", arg_size, sizeof(struct cam_fd_hw_cmd_start_args)); return -EINVAL; } Loading Loading @@ -1010,7 +1010,7 @@ int cam_fd_hw_reserve(void *hw_priv, void *hw_reserve_args, uint32_t arg_size) } if (arg_size != sizeof(struct cam_fd_hw_reserve_args)) { CAM_ERR(CAM_FD, "Invalid arg size %d, %d", arg_size, CAM_ERR(CAM_FD, "Invalid arg size %u, %lu", arg_size, sizeof(struct cam_fd_hw_reserve_args)); return -EINVAL; } Loading Loading @@ -1079,7 +1079,7 @@ int cam_fd_hw_release(void *hw_priv, void *hw_release_args, uint32_t arg_size) } if (arg_size != sizeof(struct cam_fd_hw_release_args)) { CAM_ERR(CAM_FD, "Invalid arg size %d, %d", arg_size, CAM_ERR(CAM_FD, "Invalid arg size %u, %lu", arg_size, sizeof(struct cam_fd_hw_release_args)); return -EINVAL; } Loading drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c +3 −4 Original line number Diff line number Diff line Loading @@ -1008,8 +1008,7 @@ static int cam_ife_hw_mgr_acquire_res_ife_csid_rdi( rc = cam_ife_hw_mgr_get_res(&ife_ctx->free_res_list, &csid_res); if (rc) { CAM_ERR(CAM_ISP, "No more free hw mgr resource", __func__); CAM_ERR(CAM_ISP, "No more free hw mgr resource"); goto err; } cam_ife_hw_mgr_put_res(&ife_ctx->res_list_ife_csid, &csid_res); Loading Loading @@ -2015,6 +2014,7 @@ static int cam_ife_mgr_release_hw(void *hw_mgr_priv, /* clean context */ list_del_init(&ctx->list); ctx->ctx_in_use = 0; ctx->is_rdi_only_context = 0; CAM_DBG(CAM_ISP, "Exit...ctx id:%d", ctx->ctx_index); cam_ife_hw_mgr_put_ctx(&hw_mgr->free_ctx_list, &ctx); Loading Loading @@ -2761,8 +2761,7 @@ static int cam_ife_hw_mgr_process_overflow( CAM_DBG(CAM_ISP, "Enter"); if (!recovery_data) { CAM_ERR(CAM_ISP, "recovery_data parameter is NULL", __func__); CAM_ERR(CAM_ISP, "recovery_data parameter is NULL"); return -EINVAL; } recovery_data->no_of_context = 0; Loading drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/hw_utils/irq_controller/cam_irq_controller.c +17 −17 Original line number Diff line number Diff line Loading @@ -88,7 +88,7 @@ struct cam_irq_register_obj { * @th_list_head: List of handlers sorted by priority * @hdl_idx: Unique identity of handler assigned on Subscribe. * Used to Unsubscribe. * @rw_lock: Read-Write Lock for use by controller * @lock: Lock for use by controller */ struct cam_irq_controller { const char *name; Loading @@ -101,7 +101,7 @@ struct cam_irq_controller { struct list_head evt_handler_list_head; struct list_head th_list_head[CAM_IRQ_PRIORITY_MAX]; uint32_t hdl_idx; rwlock_t rw_lock; spinlock_t lock; struct cam_irq_th_payload th_payload; }; Loading Loading @@ -208,7 +208,7 @@ int cam_irq_controller_init(const char *name, for (i = 0; i < CAM_IRQ_PRIORITY_MAX; i++) INIT_LIST_HEAD(&controller->th_list_head[i]); rwlock_init(&controller->rw_lock); spin_lock_init(&controller->lock); controller->hdl_idx = 1; *irq_controller = controller; Loading Loading @@ -304,7 +304,7 @@ int cam_irq_controller_subscribe_irq(void *irq_controller, need_lock = !in_irq(); if (need_lock) write_lock_irqsave(&controller->rw_lock, flags); spin_lock_irqsave(&controller->lock, flags); for (i = 0; i < controller->num_registers; i++) { controller->irq_register_arr[i].top_half_enable_mask[priority] |= evt_bit_mask_arr[i]; Loading @@ -317,7 +317,7 @@ int cam_irq_controller_subscribe_irq(void *irq_controller, controller->irq_register_arr[i].mask_reg_offset); } if (need_lock) write_unlock_irqrestore(&controller->rw_lock, flags); spin_unlock_irqrestore(&controller->lock, flags); list_add_tail(&evt_handler->list_node, &controller->evt_handler_list_head); Loading Loading @@ -363,7 +363,7 @@ int cam_irq_controller_enable_irq(void *irq_controller, uint32_t handle) need_lock = !in_irq(); if (need_lock) write_lock_irqsave(&controller->rw_lock, flags); spin_lock_irqsave(&controller->lock, flags); for (i = 0; i < controller->num_registers; i++) { controller->irq_register_arr[i]. top_half_enable_mask[evt_handler->priority] |= Loading @@ -378,7 +378,7 @@ int cam_irq_controller_enable_irq(void *irq_controller, uint32_t handle) controller->irq_register_arr[i].mask_reg_offset); } if (need_lock) write_unlock_irqrestore(&controller->rw_lock, flags); spin_unlock_irqrestore(&controller->lock, flags); return rc; } Loading Loading @@ -413,7 +413,7 @@ int cam_irq_controller_disable_irq(void *irq_controller, uint32_t handle) need_lock = !in_irq(); if (need_lock) write_lock_irqsave(&controller->rw_lock, flags); spin_lock_irqsave(&controller->lock, flags); for (i = 0; i < controller->num_registers; i++) { controller->irq_register_arr[i]. top_half_enable_mask[evt_handler->priority] &= Loading Loading @@ -441,7 +441,7 @@ int cam_irq_controller_disable_irq(void *irq_controller, uint32_t handle) controller->global_clear_offset); } if (need_lock) write_unlock_irqrestore(&controller->rw_lock, flags); spin_unlock_irqrestore(&controller->lock, flags); return rc; } Loading Loading @@ -475,7 +475,7 @@ int cam_irq_controller_unsubscribe_irq(void *irq_controller, if (found) { if (need_lock) write_lock_irqsave(&controller->rw_lock, flags); spin_lock_irqsave(&controller->lock, flags); for (i = 0; i < controller->num_registers; i++) { controller->irq_register_arr[i]. top_half_enable_mask[evt_handler->priority] &= Loading @@ -502,7 +502,7 @@ int cam_irq_controller_unsubscribe_irq(void *irq_controller, controller->global_clear_offset); } if (need_lock) write_unlock_irqrestore(&controller->rw_lock, flags); spin_unlock_irqrestore(&controller->lock, flags); kfree(evt_handler->evt_bit_mask_arr); kfree(evt_handler); Loading Loading @@ -607,9 +607,9 @@ irqreturn_t cam_irq_controller_handle_irq(int irq_num, void *priv) if (!controller) return IRQ_NONE; CAM_DBG(CAM_ISP, "locking controller %pK name %s rw_lock %pK", controller, controller->name, &controller->rw_lock); read_lock(&controller->rw_lock); CAM_DBG(CAM_ISP, "locking controller %pK name %s lock %pK", controller, controller->name, &controller->lock); spin_lock(&controller->lock); for (i = 0; i < controller->num_registers; i++) { controller->irq_status_arr[i] = cam_io_r_mb( controller->mem_base + Loading @@ -630,8 +630,8 @@ irqreturn_t cam_irq_controller_handle_irq(int irq_num, void *priv) i, j, need_th_processing[j]); } } CAM_DBG(CAM_ISP, "unlocked controller %pK name %s rw_lock %pK", controller, controller->name, &controller->rw_lock); CAM_DBG(CAM_ISP, "unlocked controller %pK name %s lock %pK", controller, controller->name, &controller->lock); CAM_DBG(CAM_ISP, "Status Registers read Successful"); Loading @@ -648,7 +648,7 @@ irqreturn_t cam_irq_controller_handle_irq(int irq_num, void *priv) &controller->th_list_head[i]); } } read_unlock(&controller->rw_lock); spin_unlock(&controller->lock); return IRQ_HANDLED; } Loading
drivers/media/platform/msm/camera/cam_cpas/cam_cpas_hw.c +1 −1 Original line number Diff line number Diff line Loading @@ -585,7 +585,7 @@ static int cam_cpas_util_apply_client_axi_vote( if (rc) { CAM_ERR(CAM_CPAS, "Failed camnoc vote ab[%llu] ib[%llu] rc=%d", 0, camnoc_bw, rc); (uint64_t)0, camnoc_bw, rc); goto unlock_axi_port; } } Loading
drivers/media/platform/msm/camera/cam_fd/fd_hw_mgr/cam_fd_hw_mgr.c +3 −3 Original line number Diff line number Diff line Loading @@ -402,7 +402,7 @@ static int cam_fd_packet_generic_blob_handler(void *user_data, (struct cam_fd_hw_cmd_prestart_args *)user_data; if (!blob_data || (blob_size == 0)) { CAM_ERR(CAM_FD, "Invalid blob info %pK %d", blob_data, CAM_ERR(CAM_FD, "Invalid blob info %pK %u", blob_data, blob_size); return -EINVAL; } Loading @@ -417,7 +417,7 @@ static int cam_fd_packet_generic_blob_handler(void *user_data, uint32_t *get_raw_results = (uint32_t *)blob_data; if (sizeof(uint32_t) != blob_size) { CAM_ERR(CAM_FD, "Invalid blob size %d %d", CAM_ERR(CAM_FD, "Invalid blob size %lu %u", sizeof(uint32_t), blob_size); return -EINVAL; } Loading @@ -430,7 +430,7 @@ static int cam_fd_packet_generic_blob_handler(void *user_data, (struct cam_fd_soc_clock_bw_request *)blob_data; if (sizeof(struct cam_fd_soc_clock_bw_request) != blob_size) { CAM_ERR(CAM_FD, "Invalid blob size %d %d", CAM_ERR(CAM_FD, "Invalid blob size %lu %u", sizeof(struct cam_fd_soc_clock_bw_request), blob_size); return -EINVAL; Loading
drivers/media/platform/msm/camera/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_core.c +7 −7 Original line number Diff line number Diff line Loading @@ -127,7 +127,7 @@ static int cam_fd_hw_util_fdwrapper_sync_reset(struct cam_hw_info *fd_hw) time_left = wait_for_completion_timeout(&fd_core->reset_complete, msecs_to_jiffies(CAM_FD_HW_HALT_RESET_TIMEOUT)); if (time_left <= 0) CAM_WARN(CAM_FD, "HW reset timeout time_left=%d", time_left); CAM_WARN(CAM_FD, "HW reset timeout time_left=%ld", time_left); CAM_DBG(CAM_FD, "FD Wrapper SW Sync Reset complete"); Loading Loading @@ -157,7 +157,7 @@ static int cam_fd_hw_util_fdwrapper_halt(struct cam_hw_info *fd_hw) time_left = wait_for_completion_timeout(&fd_core->halt_complete, msecs_to_jiffies(CAM_FD_HW_HALT_RESET_TIMEOUT)); if (time_left <= 0) CAM_WARN(CAM_FD, "HW halt timeout time_left=%d", time_left); CAM_WARN(CAM_FD, "HW halt timeout time_left=%ld", time_left); CAM_DBG(CAM_FD, "FD Wrapper Halt complete"); Loading Loading @@ -651,7 +651,7 @@ int cam_fd_hw_init(void *hw_priv, void *init_hw_args, uint32_t arg_size) } if (arg_size != sizeof(struct cam_fd_hw_init_args)) { CAM_ERR(CAM_FD, "Invalid arg size %d, %d", arg_size, CAM_ERR(CAM_FD, "Invalid arg size %u, %lu", arg_size, sizeof(struct cam_fd_hw_init_args)); return -EINVAL; } Loading Loading @@ -735,7 +735,7 @@ int cam_fd_hw_deinit(void *hw_priv, void *deinit_hw_args, uint32_t arg_size) } if (arg_size != sizeof(struct cam_fd_hw_deinit_args)) { CAM_ERR(CAM_FD, "Invalid arg size %d, %d", arg_size, CAM_ERR(CAM_FD, "Invalid arg size %u, %lu", arg_size, sizeof(struct cam_fd_hw_deinit_args)); return -EINVAL; } Loading Loading @@ -859,7 +859,7 @@ int cam_fd_hw_start(void *hw_priv, void *hw_start_args, uint32_t arg_size) } if (arg_size != sizeof(struct cam_fd_hw_cmd_start_args)) { CAM_ERR(CAM_FD, "Invalid arg size %d, %d", arg_size, CAM_ERR(CAM_FD, "Invalid arg size %u, %lu", arg_size, sizeof(struct cam_fd_hw_cmd_start_args)); return -EINVAL; } Loading Loading @@ -1010,7 +1010,7 @@ int cam_fd_hw_reserve(void *hw_priv, void *hw_reserve_args, uint32_t arg_size) } if (arg_size != sizeof(struct cam_fd_hw_reserve_args)) { CAM_ERR(CAM_FD, "Invalid arg size %d, %d", arg_size, CAM_ERR(CAM_FD, "Invalid arg size %u, %lu", arg_size, sizeof(struct cam_fd_hw_reserve_args)); return -EINVAL; } Loading Loading @@ -1079,7 +1079,7 @@ int cam_fd_hw_release(void *hw_priv, void *hw_release_args, uint32_t arg_size) } if (arg_size != sizeof(struct cam_fd_hw_release_args)) { CAM_ERR(CAM_FD, "Invalid arg size %d, %d", arg_size, CAM_ERR(CAM_FD, "Invalid arg size %u, %lu", arg_size, sizeof(struct cam_fd_hw_release_args)); return -EINVAL; } Loading
drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c +3 −4 Original line number Diff line number Diff line Loading @@ -1008,8 +1008,7 @@ static int cam_ife_hw_mgr_acquire_res_ife_csid_rdi( rc = cam_ife_hw_mgr_get_res(&ife_ctx->free_res_list, &csid_res); if (rc) { CAM_ERR(CAM_ISP, "No more free hw mgr resource", __func__); CAM_ERR(CAM_ISP, "No more free hw mgr resource"); goto err; } cam_ife_hw_mgr_put_res(&ife_ctx->res_list_ife_csid, &csid_res); Loading Loading @@ -2015,6 +2014,7 @@ static int cam_ife_mgr_release_hw(void *hw_mgr_priv, /* clean context */ list_del_init(&ctx->list); ctx->ctx_in_use = 0; ctx->is_rdi_only_context = 0; CAM_DBG(CAM_ISP, "Exit...ctx id:%d", ctx->ctx_index); cam_ife_hw_mgr_put_ctx(&hw_mgr->free_ctx_list, &ctx); Loading Loading @@ -2761,8 +2761,7 @@ static int cam_ife_hw_mgr_process_overflow( CAM_DBG(CAM_ISP, "Enter"); if (!recovery_data) { CAM_ERR(CAM_ISP, "recovery_data parameter is NULL", __func__); CAM_ERR(CAM_ISP, "recovery_data parameter is NULL"); return -EINVAL; } recovery_data->no_of_context = 0; Loading
drivers/media/platform/msm/camera/cam_isp/isp_hw_mgr/hw_utils/irq_controller/cam_irq_controller.c +17 −17 Original line number Diff line number Diff line Loading @@ -88,7 +88,7 @@ struct cam_irq_register_obj { * @th_list_head: List of handlers sorted by priority * @hdl_idx: Unique identity of handler assigned on Subscribe. * Used to Unsubscribe. * @rw_lock: Read-Write Lock for use by controller * @lock: Lock for use by controller */ struct cam_irq_controller { const char *name; Loading @@ -101,7 +101,7 @@ struct cam_irq_controller { struct list_head evt_handler_list_head; struct list_head th_list_head[CAM_IRQ_PRIORITY_MAX]; uint32_t hdl_idx; rwlock_t rw_lock; spinlock_t lock; struct cam_irq_th_payload th_payload; }; Loading Loading @@ -208,7 +208,7 @@ int cam_irq_controller_init(const char *name, for (i = 0; i < CAM_IRQ_PRIORITY_MAX; i++) INIT_LIST_HEAD(&controller->th_list_head[i]); rwlock_init(&controller->rw_lock); spin_lock_init(&controller->lock); controller->hdl_idx = 1; *irq_controller = controller; Loading Loading @@ -304,7 +304,7 @@ int cam_irq_controller_subscribe_irq(void *irq_controller, need_lock = !in_irq(); if (need_lock) write_lock_irqsave(&controller->rw_lock, flags); spin_lock_irqsave(&controller->lock, flags); for (i = 0; i < controller->num_registers; i++) { controller->irq_register_arr[i].top_half_enable_mask[priority] |= evt_bit_mask_arr[i]; Loading @@ -317,7 +317,7 @@ int cam_irq_controller_subscribe_irq(void *irq_controller, controller->irq_register_arr[i].mask_reg_offset); } if (need_lock) write_unlock_irqrestore(&controller->rw_lock, flags); spin_unlock_irqrestore(&controller->lock, flags); list_add_tail(&evt_handler->list_node, &controller->evt_handler_list_head); Loading Loading @@ -363,7 +363,7 @@ int cam_irq_controller_enable_irq(void *irq_controller, uint32_t handle) need_lock = !in_irq(); if (need_lock) write_lock_irqsave(&controller->rw_lock, flags); spin_lock_irqsave(&controller->lock, flags); for (i = 0; i < controller->num_registers; i++) { controller->irq_register_arr[i]. top_half_enable_mask[evt_handler->priority] |= Loading @@ -378,7 +378,7 @@ int cam_irq_controller_enable_irq(void *irq_controller, uint32_t handle) controller->irq_register_arr[i].mask_reg_offset); } if (need_lock) write_unlock_irqrestore(&controller->rw_lock, flags); spin_unlock_irqrestore(&controller->lock, flags); return rc; } Loading Loading @@ -413,7 +413,7 @@ int cam_irq_controller_disable_irq(void *irq_controller, uint32_t handle) need_lock = !in_irq(); if (need_lock) write_lock_irqsave(&controller->rw_lock, flags); spin_lock_irqsave(&controller->lock, flags); for (i = 0; i < controller->num_registers; i++) { controller->irq_register_arr[i]. top_half_enable_mask[evt_handler->priority] &= Loading Loading @@ -441,7 +441,7 @@ int cam_irq_controller_disable_irq(void *irq_controller, uint32_t handle) controller->global_clear_offset); } if (need_lock) write_unlock_irqrestore(&controller->rw_lock, flags); spin_unlock_irqrestore(&controller->lock, flags); return rc; } Loading Loading @@ -475,7 +475,7 @@ int cam_irq_controller_unsubscribe_irq(void *irq_controller, if (found) { if (need_lock) write_lock_irqsave(&controller->rw_lock, flags); spin_lock_irqsave(&controller->lock, flags); for (i = 0; i < controller->num_registers; i++) { controller->irq_register_arr[i]. top_half_enable_mask[evt_handler->priority] &= Loading @@ -502,7 +502,7 @@ int cam_irq_controller_unsubscribe_irq(void *irq_controller, controller->global_clear_offset); } if (need_lock) write_unlock_irqrestore(&controller->rw_lock, flags); spin_unlock_irqrestore(&controller->lock, flags); kfree(evt_handler->evt_bit_mask_arr); kfree(evt_handler); Loading Loading @@ -607,9 +607,9 @@ irqreturn_t cam_irq_controller_handle_irq(int irq_num, void *priv) if (!controller) return IRQ_NONE; CAM_DBG(CAM_ISP, "locking controller %pK name %s rw_lock %pK", controller, controller->name, &controller->rw_lock); read_lock(&controller->rw_lock); CAM_DBG(CAM_ISP, "locking controller %pK name %s lock %pK", controller, controller->name, &controller->lock); spin_lock(&controller->lock); for (i = 0; i < controller->num_registers; i++) { controller->irq_status_arr[i] = cam_io_r_mb( controller->mem_base + Loading @@ -630,8 +630,8 @@ irqreturn_t cam_irq_controller_handle_irq(int irq_num, void *priv) i, j, need_th_processing[j]); } } CAM_DBG(CAM_ISP, "unlocked controller %pK name %s rw_lock %pK", controller, controller->name, &controller->rw_lock); CAM_DBG(CAM_ISP, "unlocked controller %pK name %s lock %pK", controller, controller->name, &controller->lock); CAM_DBG(CAM_ISP, "Status Registers read Successful"); Loading @@ -648,7 +648,7 @@ irqreturn_t cam_irq_controller_handle_irq(int irq_num, void *priv) &controller->th_list_head[i]); } } read_unlock(&controller->rw_lock); spin_unlock(&controller->lock); return IRQ_HANDLED; }