ARM: dts: msm: Setup QUPv3 Serial Engines device nodes for sdm845

QUPv3 is a GENI based core with multiple Serial Engines(SE).  Each SE
instance can be configured to be either an I2C/SPI/UART(2 or 4 wire)
master for a given platform.
Setup a device tree file to declare all possible SE device nodes which
the platform specific device tree files can enable.

Change-Id: I1b22e286d072db7f5c628d06c57e66758252cc98
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>