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Commit 2628e8af authored by Chris Metcalf's avatar Chris Metcalf Committed by David S. Miller
Browse files

tile: support jumbo frames in the tilegx network driver 



Signed-off-by: default avatarChris Metcalf <cmetcalf@tilera.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 48f2a4e1

arch/tile/gxio/iorpc_mpipe.c

+47 −0
Original line number Diff line number Diff line
@@ -387,6 +387,27 @@ int gxio_mpipe_link_close_aux(gxio_mpipe_context_t * context, int mac) 


EXPORT_SYMBOL(gxio_mpipe_link_close_aux);



struct link_set_attr_aux_param {

	int mac;

	uint32_t attr;

	int64_t val;

};



int gxio_mpipe_link_set_attr_aux(gxio_mpipe_context_t * context, int mac,

				 uint32_t attr, int64_t val)

{

	struct link_set_attr_aux_param temp;

	struct link_set_attr_aux_param *params = &temp;



	params->mac = mac;

	params->attr = attr;

	params->val = val;



	return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,

			     sizeof(*params), GXIO_MPIPE_OP_LINK_SET_ATTR_AUX);

}



EXPORT_SYMBOL(gxio_mpipe_link_set_attr_aux);



struct get_timestamp_aux_param {

	uint64_t sec;
@@ -454,6 +475,32 @@ int gxio_mpipe_adjust_timestamp_aux(gxio_mpipe_context_t * context, 


EXPORT_SYMBOL(gxio_mpipe_adjust_timestamp_aux);



struct config_edma_ring_blks_param {

	unsigned int ering;

	unsigned int max_blks;

	unsigned int min_snf_blks;

	unsigned int db;

};



int gxio_mpipe_config_edma_ring_blks(gxio_mpipe_context_t * context,

				     unsigned int ering, unsigned int max_blks,

				     unsigned int min_snf_blks, unsigned int db)

{

	struct config_edma_ring_blks_param temp;

	struct config_edma_ring_blks_param *params = &temp;



	params->ering = ering;

	params->max_blks = max_blks;

	params->min_snf_blks = min_snf_blks;

	params->db = db;



	return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,

			     sizeof(*params),

			     GXIO_MPIPE_OP_CONFIG_EDMA_RING_BLKS);

}



EXPORT_SYMBOL(gxio_mpipe_config_edma_ring_blks);



struct arm_pollfd_param {

	union iorpc_pollfd pollfd;

};

arch/tile/gxio/mpipe.c

+15 −3
Original line number Diff line number Diff line
@@ -383,7 +383,7 @@ EXPORT_SYMBOL_GPL(gxio_mpipe_iqueue_init); 


int gxio_mpipe_equeue_init(gxio_mpipe_equeue_t *equeue,

			   gxio_mpipe_context_t *context,

			   unsigned int edma_ring_id,

			   unsigned int ering,

			   unsigned int channel,

			   void *mem, unsigned int mem_size,

			   unsigned int mem_flags)
@@ -394,7 +394,7 @@ int gxio_mpipe_equeue_init(gxio_mpipe_equeue_t *equeue, 
	/* Offset used to read number of completed commands. */

	MPIPE_EDMA_POST_REGION_ADDR_t offset;



	int result = gxio_mpipe_init_edma_ring(context, edma_ring_id, channel,

	int result = gxio_mpipe_init_edma_ring(context, ering, channel,

					       mem, mem_size, mem_flags);

	if (result < 0)

		return result;
@@ -405,7 +405,7 @@ int gxio_mpipe_equeue_init(gxio_mpipe_equeue_t *equeue, 
	offset.region =

		MPIPE_MMIO_ADDR__REGION_VAL_EDMA -

		MPIPE_MMIO_ADDR__REGION_VAL_IDMA;

	offset.ring = edma_ring_id;

	offset.ring = ering;



	__gxio_dma_queue_init(&equeue->dma_queue,

			      context->mmio_fast_base + offset.word,
@@ -413,6 +413,9 @@ int gxio_mpipe_equeue_init(gxio_mpipe_equeue_t *equeue, 
	equeue->edescs = mem;

	equeue->mask_num_entries = num_entries - 1;

	equeue->log2_num_entries = __builtin_ctz(num_entries);

	equeue->context = context;

	equeue->ering = ering;

	equeue->channel = channel;



	return 0;

}
@@ -543,3 +546,12 @@ int gxio_mpipe_link_close(gxio_mpipe_link_t *link) 
}



EXPORT_SYMBOL_GPL(gxio_mpipe_link_close);



int gxio_mpipe_link_set_attr(gxio_mpipe_link_t *link, uint32_t attr,

			     int64_t val)

{

	return gxio_mpipe_link_set_attr_aux(link->context, link->mac, attr,

					    val);

}



EXPORT_SYMBOL_GPL(gxio_mpipe_link_set_attr);

arch/tile/include/gxio/iorpc_mpipe.h

+4 −0
Original line number Diff line number Diff line
@@ -44,10 +44,12 @@ 
#define GXIO_MPIPE_OP_REGISTER_CLIENT_MEMORY IORPC_OPCODE(IORPC_FORMAT_NONE_NOUSER, 0x1210)

#define GXIO_MPIPE_OP_LINK_OPEN_AUX    IORPC_OPCODE(IORPC_FORMAT_NONE, 0x1211)

#define GXIO_MPIPE_OP_LINK_CLOSE_AUX   IORPC_OPCODE(IORPC_FORMAT_NONE, 0x1212)

#define GXIO_MPIPE_OP_LINK_SET_ATTR_AUX IORPC_OPCODE(IORPC_FORMAT_NONE, 0x1213)



#define GXIO_MPIPE_OP_GET_TIMESTAMP_AUX IORPC_OPCODE(IORPC_FORMAT_NONE_NOUSER, 0x121e)

#define GXIO_MPIPE_OP_SET_TIMESTAMP_AUX IORPC_OPCODE(IORPC_FORMAT_NONE_NOUSER, 0x121f)

#define GXIO_MPIPE_OP_ADJUST_TIMESTAMP_AUX IORPC_OPCODE(IORPC_FORMAT_NONE_NOUSER, 0x1220)

#define GXIO_MPIPE_OP_CONFIG_EDMA_RING_BLKS IORPC_OPCODE(IORPC_FORMAT_NONE, 0x1221)

#define GXIO_MPIPE_OP_ARM_POLLFD       IORPC_OPCODE(IORPC_FORMAT_KERNEL_POLLFD, 0x9000)

#define GXIO_MPIPE_OP_CLOSE_POLLFD     IORPC_OPCODE(IORPC_FORMAT_KERNEL_POLLFD, 0x9001)

#define GXIO_MPIPE_OP_GET_MMIO_BASE    IORPC_OPCODE(IORPC_FORMAT_NONE_NOUSER, 0x8000)
@@ -114,6 +116,8 @@ int gxio_mpipe_link_open_aux(gxio_mpipe_context_t * context, 


int gxio_mpipe_link_close_aux(gxio_mpipe_context_t * context, int mac);



int gxio_mpipe_link_set_attr_aux(gxio_mpipe_context_t * context, int mac,

				 uint32_t attr, int64_t val);



int gxio_mpipe_get_timestamp_aux(gxio_mpipe_context_t * context, uint64_t * sec,

				 uint64_t * nsec, uint64_t * cycles);

arch/tile/include/gxio/mpipe.h

+97 −4
Original line number Diff line number Diff line
@@ -810,7 +810,7 @@ extern int gxio_mpipe_alloc_edma_rings(gxio_mpipe_context_t *context, 
/* Initialize an eDMA ring, using the given memory and size.

 *

 * @param context An initialized mPIPE context.

 * @param ring The eDMA ring index.

 * @param ering The eDMA ring index.

 * @param channel The channel to use.  This must be one of the channels

 * associated with the context's set of open links.

 * @param mem A physically contiguous region of memory to be filled
@@ -823,10 +823,37 @@ extern int gxio_mpipe_alloc_edma_rings(gxio_mpipe_context_t *context, 
 * ::GXIO_ERR_INVAL_MEMORY_SIZE on failure.

 */

extern int gxio_mpipe_init_edma_ring(gxio_mpipe_context_t *context,

				     unsigned int ring, unsigned int channel,

				     unsigned int ering, unsigned int channel,

				     void *mem, size_t mem_size,

				     unsigned int mem_flags);



/* Set the "max_blks", "min_snf_blks", and "db" fields of

 * ::MPIPE_EDMA_RG_INIT_DAT_THRESH_t for a given edma ring.

 *

 * The global pool of dynamic blocks will be automatically adjusted.

 *

 * This function should not be called after any egress has been done

 * on the edma ring.

 *

 * Most applications should just use gxio_mpipe_equeue_set_snf_size().

 *

 * @param context An initialized mPIPE context.

 * @param ering The eDMA ring index.

 * @param max_blks The number of blocks to dedicate to the ring

 * (normally min_snf_blks + 1).  Must be greater than min_snf_blocks.

 * @param min_snf_blks The number of blocks which must be stored

 * prior to starting to send the packet (normally 12).

 * @param db Whether to allow use of dynamic blocks by the ring

 * (normally 1).

 *

 * @return 0 on success, negative on error.

 */

extern int gxio_mpipe_config_edma_ring_blks(gxio_mpipe_context_t *context,

					    unsigned int ering,

					    unsigned int max_blks,

					    unsigned int min_snf_blks,

					    unsigned int db);



/*****************************************************************

 *                      Classifier Program                        *

 ******************************************************************/
@@ -1288,15 +1315,39 @@ typedef struct { 
	/* The log2() of the number of entries. */

	unsigned long log2_num_entries;



	/* The context. */

	gxio_mpipe_context_t *context;



	/* The ering. */

	unsigned int ering;



	/* The channel. */

	unsigned int channel;



} gxio_mpipe_equeue_t;



/* Initialize an "equeue".

 *

 * Takes the equeue plus the same args as gxio_mpipe_init_edma_ring().

 * This function uses gxio_mpipe_init_edma_ring() to initialize the

 * underlying edma_ring using the provided arguments.

 *

 * @param equeue An egress queue to be initialized.

 * @param context An initialized mPIPE context.

 * @param ering The eDMA ring index.

 * @param channel The channel to use.  This must be one of the channels

 * associated with the context's set of open links.

 * @param mem A physically contiguous region of memory to be filled

 * with a ring of ::gxio_mpipe_edesc_t structures.

 * @param mem_size Number of bytes in the ring.  Must be 512, 2048,

 * 8192 or 65536, times 16 (i.e. sizeof(gxio_mpipe_edesc_t)).

 * @param mem_flags ::gxio_mpipe_mem_flags_e memory flags.

 *

 * @return 0 on success, ::GXIO_MPIPE_ERR_BAD_EDMA_RING or

 * ::GXIO_ERR_INVAL_MEMORY_SIZE on failure.

 */

extern int gxio_mpipe_equeue_init(gxio_mpipe_equeue_t *equeue,

				  gxio_mpipe_context_t *context,

				  unsigned int edma_ring_id,

				  unsigned int ering,

				  unsigned int channel,

				  void *mem, unsigned int mem_size,

				  unsigned int mem_flags);
@@ -1494,6 +1545,37 @@ static inline int gxio_mpipe_equeue_is_complete(gxio_mpipe_equeue_t *equeue, 
					    completion_slot, update);

}



/* Set the snf (store and forward) size for an equeue.

 *

 * The snf size for an equeue defaults to 1536, and encodes the size

 * of the largest packet for which egress is guaranteed to avoid

 * transmission underruns and/or corrupt checksums under heavy load.

 *

 * The snf size affects a global resource pool which cannot support,

 * for example, all 24 equeues each requesting an snf size of 8K.

 *

 * To ensure that jumbo packets can be egressed properly, the snf size

 * should be set to the size of the largest possible packet, which

 * will usually be limited by the size of the app's largest buffer.

 *

 * This is a convenience wrapper around

 * gxio_mpipe_config_edma_ring_blks().

 *

 * This function should not be called after any egress has been done

 * on the equeue.

 *

 * @param equeue An egress queue initialized via gxio_mpipe_equeue_init().

 * @param size The snf size, in bytes.

 * @return Zero on success, negative error otherwise.

 */

static inline int gxio_mpipe_equeue_set_snf_size(gxio_mpipe_equeue_t *equeue,

						 size_t size)

{

	int blks = (size + 127) / 128;

	return gxio_mpipe_config_edma_ring_blks(equeue->context, equeue->ering,

						blks + 1, blks, 1);

}



/*****************************************************************

 *                        Link Management                         *

 ******************************************************************/
@@ -1697,6 +1779,17 @@ static inline int gxio_mpipe_link_channel(gxio_mpipe_link_t *link) 
	return link->channel;

}



/* Set a link attribute.

 *

 * @param link A properly initialized link state object.

 * @param attr An attribute from the set of @ref gxio_mpipe_link_attrs.

 * @param val New value of the attribute.

 * @return 0 if the attribute was successfully set, or a negative error

 *  code.

 */

extern int gxio_mpipe_link_set_attr(gxio_mpipe_link_t *link, uint32_t attr,

				    int64_t val);



///////////////////////////////////////////////////////////////////

//                             Timestamp                         //

///////////////////////////////////////////////////////////////////

drivers/net/ethernet/tile/tilegx.c

+188 −159

File changed.

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