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Commit 21046190 authored by Prasad Sodagudi's avatar Prasad Sodagudi Committed by Gerrit - the friendly Code Review server
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drivers: soc: qcom: Fix register names used with proper macros 



Currently r0, r1, etc registers are used in scm driver.
To have compatibility between the arm and arm64 bit modes,
start using R0_STR, R1_STR, etc macros. GCC apparently lets
use r0, r1, etc. as register names even in arm64 mode but
clang does not. So by using marcos in inline assembly,
we can avoid compiler warnings.

Change-Id: I8a7103738bb6603693287afd22c0346cb397458e
Signed-off-by: default avatarTrilok Soni <tsoni@codeaurora.org>
Signed-off-by: default avatarPrasad Sodagudi <psodagud@codeaurora.org>
Signed-off-by: default avatarShadab Naseem <snaseem@codeaurora.org>
parent 6f8fab7a

drivers/soc/qcom/scm.c

+52 −52
Original line number Original line Diff line number Diff line 
/* Copyright (c) 2010-2018, The Linux Foundation. All rights reserved.

/* Copyright (c) 2010-2019, The Linux Foundation. All rights reserved.

 *

 *

 * This program is free software; you can redistribute it and/or modify

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * it under the terms of the GNU General Public License version 2 and
@@ -194,9 +194,9 @@ static int scm_remap_error(int err) 
static u32 smc(u32 cmd_addr)

static u32 smc(u32 cmd_addr)

{

{

	int context_id;

	int context_id;

	register u32 r0 asm("r0") = 1;

	register u32 r0 asm(R0_STR) = 1;

	register u32 r1 asm("r1") = (uintptr_t)&context_id;

	register u32 r1 asm(R1_STR) = (uintptr_t)&context_id;

	register u32 r2 asm("r2") = cmd_addr;

	register u32 r2 asm(R2_STR) = cmd_addr;

	do {

	do {

		asm volatile(

		asm volatile(

			__asmeq("%0", R0_STR)

			__asmeq("%0", R0_STR)
@@ -209,7 +209,7 @@ static u32 smc(u32 cmd_addr) 
			"smc	#0\n"

			"smc	#0\n"

			: "=r" (r0)

			: "=r" (r0)

			: "r" (r0), "r" (r1), "r" (r2)

			: "r" (r0), "r" (r1), "r" (r2)

			: "r3");

			: R3_STR);

	} while (r0 == SCM_INTERRUPTED);

	} while (r0 == SCM_INTERRUPTED);





	return r0;

	return r0;
@@ -382,13 +382,13 @@ int scm_call_noalloc(u32 svc_id, u32 cmd_id, const void *cmd_buf, 
static int __scm_call_armv8_64(u64 x0, u64 x1, u64 x2, u64 x3, u64 x4, u64 x5,

static int __scm_call_armv8_64(u64 x0, u64 x1, u64 x2, u64 x3, u64 x4, u64 x5,

				u64 *ret1, u64 *ret2, u64 *ret3)

				u64 *ret1, u64 *ret2, u64 *ret3)

{

{

	register u64 r0 asm("r0") = x0;

	register u64 r0 asm("x0") = x0;

	register u64 r1 asm("r1") = x1;

	register u64 r1 asm("x1") = x1;

	register u64 r2 asm("r2") = x2;

	register u64 r2 asm("x2") = x2;

	register u64 r3 asm("r3") = x3;

	register u64 r3 asm("x3") = x3;

	register u64 r4 asm("r4") = x4;

	register u64 r4 asm("x4") = x4;

	register u64 r5 asm("r5") = x5;

	register u64 r5 asm("x5") = x5;

	register u64 r6 asm("r6") = 0;

	register u64 r6 asm("x6") = 0;





	do {

	do {

		asm volatile(

		asm volatile(
@@ -431,13 +431,13 @@ static int __scm_call_armv8_64(u64 x0, u64 x1, u64 x2, u64 x3, u64 x4, u64 x5, 
static int __scm_call_armv8_32(u32 w0, u32 w1, u32 w2, u32 w3, u32 w4, u32 w5,

static int __scm_call_armv8_32(u32 w0, u32 w1, u32 w2, u32 w3, u32 w4, u32 w5,

				u64 *ret1, u64 *ret2, u64 *ret3)

				u64 *ret1, u64 *ret2, u64 *ret3)

{

{

	register u32 r0 asm("r0") = w0;

	register u32 r0 asm("w0") = w0;

	register u32 r1 asm("r1") = w1;

	register u32 r1 asm("w1") = w1;

	register u32 r2 asm("r2") = w2;

	register u32 r2 asm("w2") = w2;

	register u32 r3 asm("r3") = w3;

	register u32 r3 asm("w3") = w3;

	register u32 r4 asm("r4") = w4;

	register u32 r4 asm("w4") = w4;

	register u32 r5 asm("r5") = w5;

	register u32 r5 asm("w5") = w5;

	register u32 r6 asm("r6") = 0;

	register u32 r6 asm("w6") = 0;





	do {

	do {

		asm volatile(

		asm volatile(
@@ -843,9 +843,9 @@ EXPORT_SYMBOL(scm_call); 
s32 scm_call_atomic1(u32 svc, u32 cmd, u32 arg1)

s32 scm_call_atomic1(u32 svc, u32 cmd, u32 arg1)

{

{

	int context_id;

	int context_id;

	register u32 r0 asm("r0") = SCM_ATOMIC(svc, cmd, 1);

	register u32 r0 asm(R0_STR) = SCM_ATOMIC(svc, cmd, 1);

	register u32 r1 asm("r1") = (uintptr_t)&context_id;

	register u32 r1 asm(R1_STR) = (uintptr_t)&context_id;

	register u32 r2 asm("r2") = arg1;

	register u32 r2 asm(R2_STR) = arg1;





	asm volatile(

	asm volatile(

		__asmeq("%0", R0_STR)

		__asmeq("%0", R0_STR)
@@ -858,7 +858,7 @@ s32 scm_call_atomic1(u32 svc, u32 cmd, u32 arg1) 
		"smc	#0\n"

		"smc	#0\n"

		: "=r" (r0)

		: "=r" (r0)

		: "r" (r0), "r" (r1), "r" (r2)

		: "r" (r0), "r" (r1), "r" (r2)

		: "r3");

		: R3_STR);

	return r0;

	return r0;

}

}

EXPORT_SYMBOL(scm_call_atomic1);

EXPORT_SYMBOL(scm_call_atomic1);
@@ -876,9 +876,9 @@ EXPORT_SYMBOL(scm_call_atomic1); 
s32 scm_call_atomic1_1(u32 svc, u32 cmd, u32 arg1, u32 *ret1)

s32 scm_call_atomic1_1(u32 svc, u32 cmd, u32 arg1, u32 *ret1)

{

{

	int context_id;

	int context_id;

	register u32 r0 asm("r0") = SCM_ATOMIC(svc, cmd, 1);

	register u32 r0 asm(R0_STR) = SCM_ATOMIC(svc, cmd, 1);

	register u32 r1 asm("r1") = (uintptr_t)&context_id;

	register u32 r1 asm(R1_STR) = (uintptr_t)&context_id;

	register u32 r2 asm("r2") = arg1;

	register u32 r2 asm(R2_STR) = arg1;





	asm volatile(

	asm volatile(

		__asmeq("%0", R0_STR)

		__asmeq("%0", R0_STR)
@@ -892,7 +892,7 @@ s32 scm_call_atomic1_1(u32 svc, u32 cmd, u32 arg1, u32 *ret1) 
		"smc	#0\n"

		"smc	#0\n"

		: "=r" (r0), "=r" (r1)

		: "=r" (r0), "=r" (r1)

		: "r" (r0), "r" (r1), "r" (r2)

		: "r" (r0), "r" (r1), "r" (r2)

		: "r3");

		: R3_STR);

	if (ret1)

	if (ret1)

		*ret1 = r1;

		*ret1 = r1;

	return r0;

	return r0;
@@ -912,10 +912,10 @@ EXPORT_SYMBOL(scm_call_atomic1_1); 
s32 scm_call_atomic2(u32 svc, u32 cmd, u32 arg1, u32 arg2)

s32 scm_call_atomic2(u32 svc, u32 cmd, u32 arg1, u32 arg2)

{

{

	int context_id;

	int context_id;

	register u32 r0 asm("r0") = SCM_ATOMIC(svc, cmd, 2);

	register u32 r0 asm(R0_STR) = SCM_ATOMIC(svc, cmd, 2);

	register u32 r1 asm("r1") = (uintptr_t)&context_id;

	register u32 r1 asm(R1_STR) = (uintptr_t)&context_id;

	register u32 r2 asm("r2") = arg1;

	register u32 r2 asm(R2_STR) = arg1;

	register u32 r3 asm("r3") = arg2;

	register u32 r3 asm(R3_STR) = arg2;





	asm volatile(

	asm volatile(

		__asmeq("%0", R0_STR)

		__asmeq("%0", R0_STR)
@@ -947,11 +947,11 @@ EXPORT_SYMBOL(scm_call_atomic2); 
s32 scm_call_atomic3(u32 svc, u32 cmd, u32 arg1, u32 arg2, u32 arg3)

s32 scm_call_atomic3(u32 svc, u32 cmd, u32 arg1, u32 arg2, u32 arg3)

{

{

	int context_id;

	int context_id;

	register u32 r0 asm("r0") = SCM_ATOMIC(svc, cmd, 3);

	register u32 r0 asm(R0_STR) = SCM_ATOMIC(svc, cmd, 3);

	register u32 r1 asm("r1") = (uintptr_t)&context_id;

	register u32 r1 asm(R1_STR) = (uintptr_t)&context_id;

	register u32 r2 asm("r2") = arg1;

	register u32 r2 asm(R2_STR) = arg1;

	register u32 r3 asm("r3") = arg2;

	register u32 r3 asm(R3_STR) = arg2;

	register u32 r4 asm("r4") = arg3;

	register u32 r4 asm(R4_STR) = arg3;





	asm volatile(

	asm volatile(

		__asmeq("%0", R0_STR)

		__asmeq("%0", R0_STR)
@@ -975,12 +975,12 @@ s32 scm_call_atomic4_3(u32 svc, u32 cmd, u32 arg1, u32 arg2, 
{

{

	int ret;

	int ret;

	int context_id;

	int context_id;

	register u32 r0 asm("r0") = SCM_ATOMIC(svc, cmd, 4);

	register u32 r0 asm(R0_STR) = SCM_ATOMIC(svc, cmd, 4);

	register u32 r1 asm("r1") = (uintptr_t)&context_id;

	register u32 r1 asm(R1_STR) = (uintptr_t)&context_id;

	register u32 r2 asm("r2") = arg1;

	register u32 r2 asm(R2_STR) = arg1;

	register u32 r3 asm("r3") = arg2;

	register u32 r3 asm(R3_STR) = arg2;

	register u32 r4 asm("r4") = arg3;

	register u32 r4 asm(R4_STR) = arg3;

	register u32 r5 asm("r5") = arg4;

	register u32 r5 asm(R5_STR) = arg4;





	asm volatile(

	asm volatile(

		__asmeq("%0", R0_STR)

		__asmeq("%0", R0_STR)
@@ -1026,13 +1026,13 @@ s32 scm_call_atomic5_3(u32 svc, u32 cmd, u32 arg1, u32 arg2, 
{

{

	int ret;

	int ret;

	int context_id;

	int context_id;

	register u32 r0 asm("r0") = SCM_ATOMIC(svc, cmd, 5);

	register u32 r0 asm(R0_STR) = SCM_ATOMIC(svc, cmd, 5);

	register u32 r1 asm("r1") = (uintptr_t)&context_id;

	register u32 r1 asm(R1_STR) = (uintptr_t)&context_id;

	register u32 r2 asm("r2") = arg1;

	register u32 r2 asm(R2_STR) = arg1;

	register u32 r3 asm("r3") = arg2;

	register u32 r3 asm(R3_STR) = arg2;

	register u32 r4 asm("r4") = arg3;

	register u32 r4 asm(R4_STR) = arg3;

	register u32 r5 asm("r5") = arg4;

	register u32 r5 asm(R5_STR) = arg4;

	register u32 r6 asm("r6") = arg5;

	register u32 r6 asm(R6_STR) = arg5;





	asm volatile(

	asm volatile(

		__asmeq("%0", R0_STR)

		__asmeq("%0", R0_STR)
@@ -1066,8 +1066,8 @@ u32 scm_get_version(void) 
{

{

	int context_id;

	int context_id;

	static u32 version = -1;

	static u32 version = -1;

	register u32 r0 asm("r0");

	register u32 r0 asm(R0_STR);

	register u32 r1 asm("r1");

	register u32 r1 asm(R1_STR);





	if (version != -1)

	if (version != -1)

		return version;

		return version;
@@ -1088,7 +1088,7 @@ u32 scm_get_version(void) 
			"smc	#0\n"

			"smc	#0\n"

			: "=r" (r0), "=r" (r1)

			: "=r" (r0), "=r" (r1)

			: "r" (r0), "r" (r1)

			: "r" (r0), "r" (r1)

			: "r2", "r3");

			: R2_STR, R3_STR);

	} while (r0 == SCM_INTERRUPTED);

	} while (r0 == SCM_INTERRUPTED);





	version = r1;

	version = r1;