Loading drivers/clk/qcom/gcc-sdxpoorwills.c +10 −1 Original line number Diff line number Diff line Loading @@ -556,12 +556,21 @@ static struct clk_rcg2 gcc_emac_clk_src = { }, }; static const struct freq_tbl ftbl_gcc_emac_ptp_clk_src[] = { F(19200000, P_BI_TCXO, 1, 0, 0), F(25000000, P_GPLL0_OUT_EVEN, 12, 0, 0), F(50000000, P_GPLL0_OUT_EVEN, 6, 0, 0), F(125000000, P_GPLL4_OUT_EVEN, 4, 0, 0), F(250000000, P_GPLL4_OUT_EVEN, 2, 0, 0), { } }; static struct clk_rcg2 gcc_emac_ptp_clk_src = { .cmd_rcgr = 0x47038, .mnd_width = 0, .hid_width = 5, .parent_map = gcc_parent_map_4, .freq_tbl = ftbl_gcc_emac_clk_src, .freq_tbl = ftbl_gcc_emac_ptp_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_emac_ptp_clk_src", .parent_names = gcc_parent_names_4, Loading Loading
drivers/clk/qcom/gcc-sdxpoorwills.c +10 −1 Original line number Diff line number Diff line Loading @@ -556,12 +556,21 @@ static struct clk_rcg2 gcc_emac_clk_src = { }, }; static const struct freq_tbl ftbl_gcc_emac_ptp_clk_src[] = { F(19200000, P_BI_TCXO, 1, 0, 0), F(25000000, P_GPLL0_OUT_EVEN, 12, 0, 0), F(50000000, P_GPLL0_OUT_EVEN, 6, 0, 0), F(125000000, P_GPLL4_OUT_EVEN, 4, 0, 0), F(250000000, P_GPLL4_OUT_EVEN, 2, 0, 0), { } }; static struct clk_rcg2 gcc_emac_ptp_clk_src = { .cmd_rcgr = 0x47038, .mnd_width = 0, .hid_width = 5, .parent_map = gcc_parent_map_4, .freq_tbl = ftbl_gcc_emac_clk_src, .freq_tbl = ftbl_gcc_emac_ptp_clk_src, .clkr.hw.init = &(struct clk_init_data){ .name = "gcc_emac_ptp_clk_src", .parent_names = gcc_parent_names_4, Loading