Loading drivers/irqchip/irq-gic-common.h +6 −0 Original line number Diff line number Diff line Loading @@ -30,6 +30,12 @@ struct gic_quirk { extern bool from_suspend; extern struct irq_chip gic_arch_extn; #ifdef CONFIG_QCOM_SHOW_RESUME_IRQ extern int msm_show_resume_irq_mask; #else #define msm_show_resume_irq_mask 0 #endif int gic_configure_irq(unsigned int irq, unsigned int type, void __iomem *base, void (*sync_access)(void)); void gic_dist_config(void __iomem *base, int gic_irqs, Loading drivers/irqchip/irq-gic-v3.c +65 −0 Original line number Diff line number Diff line Loading @@ -40,6 +40,8 @@ #include <asm/smp_plat.h> #include <asm/virt.h> #include <linux/syscore_ops.h> #include "irq-gic-common.h" struct redist_region { Loading Loading @@ -370,6 +372,69 @@ static int gic_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu) return 0; } #ifdef CONFIG_PM static int gic_suspend(void) { return 0; } static void gic_show_resume_irq(struct gic_chip_data *gic) { unsigned int i; u32 enabled; u32 pending[32]; void __iomem *base = gic_data.dist_base; if (!msm_show_resume_irq_mask) return; for (i = 0; i * 32 < gic->irq_nr; i++) { enabled = readl_relaxed(base + GICD_ICENABLER + i * 4); pending[i] = readl_relaxed(base + GICD_ISPENDR + i * 4); pending[i] &= enabled; } for (i = find_first_bit((unsigned long *)pending, gic->irq_nr); i < gic->irq_nr; i = find_next_bit((unsigned long *)pending, gic->irq_nr, i+1)) { unsigned int irq = irq_find_mapping(gic->domain, i); struct irq_desc *desc = irq_to_desc(irq); const char *name = "null"; if (desc == NULL) name = "stray irq"; else if (desc->action && desc->action->name) name = desc->action->name; pr_warn("%s: %d triggered %s\n", __func__, irq, name); } } static void gic_resume_one(struct gic_chip_data *gic) { gic_show_resume_irq(gic); } static void gic_resume(void) { gic_resume_one(&gic_data); } static struct syscore_ops gic_syscore_ops = { .suspend = gic_suspend, .resume = gic_resume, }; static int __init gic_init_sys(void) { register_syscore_ops(&gic_syscore_ops); return 0; } arch_initcall(gic_init_sys); #endif static u64 gic_mpidr_to_affinity(unsigned long mpidr) { u64 aff; Loading drivers/pinctrl/qcom/pinctrl-msm.c +53 −1 Original line number Diff line number Diff line Loading @@ -30,6 +30,7 @@ #include <linux/gpio.h> #include <linux/interrupt.h> #include <linux/spinlock.h> #include <linux/syscore_ops.h> #include <linux/reboot.h> #include <linux/pm.h> #include <linux/log2.h> Loading Loading @@ -74,6 +75,8 @@ struct msm_pinctrl { void __iomem *pdc_regs; }; static struct msm_pinctrl *msm_pinctrl_data; static int msm_get_groups_count(struct pinctrl_dev *pctldev) { struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); Loading Loading @@ -1520,6 +1523,52 @@ static void msm_pinctrl_setup_pm_reset(struct msm_pinctrl *pctrl) } } #ifdef CONFIG_PM static int msm_pinctrl_suspend(void) { return 0; } static void msm_pinctrl_resume(void) { int i, irq; u32 val; unsigned long flags; struct irq_desc *desc; const struct msm_pingroup *g; const char *name = "null"; struct msm_pinctrl *pctrl = msm_pinctrl_data; if (!msm_show_resume_irq_mask) return; spin_lock_irqsave(&pctrl->lock, flags); for_each_set_bit(i, pctrl->enabled_irqs, pctrl->chip.ngpio) { g = &pctrl->soc->groups[i]; val = readl_relaxed(pctrl->regs + g->intr_status_reg); if (val & BIT(g->intr_status_bit)) { irq = irq_find_mapping(pctrl->chip.irqdomain, i); desc = irq_to_desc(irq); if (desc == NULL) name = "stray irq"; else if (desc->action && desc->action->name) name = desc->action->name; pr_warn("%s: %d triggered %s\n", __func__, irq, name); } } spin_unlock_irqrestore(&pctrl->lock, flags); } #else #define msm_pinctrl_suspend NULL #define msm_pinctrl_resume NULL #endif static struct syscore_ops msm_pinctrl_pm_ops = { .suspend = msm_pinctrl_suspend, .resume = msm_pinctrl_resume, }; int msm_pinctrl_probe(struct platform_device *pdev, const struct msm_pinctrl_soc_data *soc_data) { Loading @@ -1527,7 +1576,8 @@ int msm_pinctrl_probe(struct platform_device *pdev, struct resource *res; int ret; pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); msm_pinctrl_data = pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); if (!pctrl) { dev_err(&pdev->dev, "Can't allocate msm_pinctrl\n"); return -ENOMEM; Loading Loading @@ -1570,6 +1620,7 @@ int msm_pinctrl_probe(struct platform_device *pdev, platform_set_drvdata(pdev, pctrl); register_syscore_ops(&msm_pinctrl_pm_ops); dev_dbg(&pdev->dev, "Probed Qualcomm pinctrl driver\n"); return 0; Loading @@ -1583,6 +1634,7 @@ int msm_pinctrl_remove(struct platform_device *pdev) gpiochip_remove(&pctrl->chip); unregister_restart_handler(&pctrl->restart_nb); unregister_syscore_ops(&msm_pinctrl_pm_ops); return 0; } Loading drivers/pinctrl/qcom/pinctrl-msm.h +6 −0 Original line number Diff line number Diff line Loading @@ -174,4 +174,10 @@ int msm_pinctrl_probe(struct platform_device *pdev, const struct msm_pinctrl_soc_data *soc_data); int msm_pinctrl_remove(struct platform_device *pdev); #ifdef CONFIG_QCOM_SHOW_RESUME_IRQ extern int msm_show_resume_irq_mask; #else #define msm_show_resume_irq_mask 0 #endif #endif Loading
drivers/irqchip/irq-gic-common.h +6 −0 Original line number Diff line number Diff line Loading @@ -30,6 +30,12 @@ struct gic_quirk { extern bool from_suspend; extern struct irq_chip gic_arch_extn; #ifdef CONFIG_QCOM_SHOW_RESUME_IRQ extern int msm_show_resume_irq_mask; #else #define msm_show_resume_irq_mask 0 #endif int gic_configure_irq(unsigned int irq, unsigned int type, void __iomem *base, void (*sync_access)(void)); void gic_dist_config(void __iomem *base, int gic_irqs, Loading
drivers/irqchip/irq-gic-v3.c +65 −0 Original line number Diff line number Diff line Loading @@ -40,6 +40,8 @@ #include <asm/smp_plat.h> #include <asm/virt.h> #include <linux/syscore_ops.h> #include "irq-gic-common.h" struct redist_region { Loading Loading @@ -370,6 +372,69 @@ static int gic_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu) return 0; } #ifdef CONFIG_PM static int gic_suspend(void) { return 0; } static void gic_show_resume_irq(struct gic_chip_data *gic) { unsigned int i; u32 enabled; u32 pending[32]; void __iomem *base = gic_data.dist_base; if (!msm_show_resume_irq_mask) return; for (i = 0; i * 32 < gic->irq_nr; i++) { enabled = readl_relaxed(base + GICD_ICENABLER + i * 4); pending[i] = readl_relaxed(base + GICD_ISPENDR + i * 4); pending[i] &= enabled; } for (i = find_first_bit((unsigned long *)pending, gic->irq_nr); i < gic->irq_nr; i = find_next_bit((unsigned long *)pending, gic->irq_nr, i+1)) { unsigned int irq = irq_find_mapping(gic->domain, i); struct irq_desc *desc = irq_to_desc(irq); const char *name = "null"; if (desc == NULL) name = "stray irq"; else if (desc->action && desc->action->name) name = desc->action->name; pr_warn("%s: %d triggered %s\n", __func__, irq, name); } } static void gic_resume_one(struct gic_chip_data *gic) { gic_show_resume_irq(gic); } static void gic_resume(void) { gic_resume_one(&gic_data); } static struct syscore_ops gic_syscore_ops = { .suspend = gic_suspend, .resume = gic_resume, }; static int __init gic_init_sys(void) { register_syscore_ops(&gic_syscore_ops); return 0; } arch_initcall(gic_init_sys); #endif static u64 gic_mpidr_to_affinity(unsigned long mpidr) { u64 aff; Loading
drivers/pinctrl/qcom/pinctrl-msm.c +53 −1 Original line number Diff line number Diff line Loading @@ -30,6 +30,7 @@ #include <linux/gpio.h> #include <linux/interrupt.h> #include <linux/spinlock.h> #include <linux/syscore_ops.h> #include <linux/reboot.h> #include <linux/pm.h> #include <linux/log2.h> Loading Loading @@ -74,6 +75,8 @@ struct msm_pinctrl { void __iomem *pdc_regs; }; static struct msm_pinctrl *msm_pinctrl_data; static int msm_get_groups_count(struct pinctrl_dev *pctldev) { struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); Loading Loading @@ -1520,6 +1523,52 @@ static void msm_pinctrl_setup_pm_reset(struct msm_pinctrl *pctrl) } } #ifdef CONFIG_PM static int msm_pinctrl_suspend(void) { return 0; } static void msm_pinctrl_resume(void) { int i, irq; u32 val; unsigned long flags; struct irq_desc *desc; const struct msm_pingroup *g; const char *name = "null"; struct msm_pinctrl *pctrl = msm_pinctrl_data; if (!msm_show_resume_irq_mask) return; spin_lock_irqsave(&pctrl->lock, flags); for_each_set_bit(i, pctrl->enabled_irqs, pctrl->chip.ngpio) { g = &pctrl->soc->groups[i]; val = readl_relaxed(pctrl->regs + g->intr_status_reg); if (val & BIT(g->intr_status_bit)) { irq = irq_find_mapping(pctrl->chip.irqdomain, i); desc = irq_to_desc(irq); if (desc == NULL) name = "stray irq"; else if (desc->action && desc->action->name) name = desc->action->name; pr_warn("%s: %d triggered %s\n", __func__, irq, name); } } spin_unlock_irqrestore(&pctrl->lock, flags); } #else #define msm_pinctrl_suspend NULL #define msm_pinctrl_resume NULL #endif static struct syscore_ops msm_pinctrl_pm_ops = { .suspend = msm_pinctrl_suspend, .resume = msm_pinctrl_resume, }; int msm_pinctrl_probe(struct platform_device *pdev, const struct msm_pinctrl_soc_data *soc_data) { Loading @@ -1527,7 +1576,8 @@ int msm_pinctrl_probe(struct platform_device *pdev, struct resource *res; int ret; pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); msm_pinctrl_data = pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); if (!pctrl) { dev_err(&pdev->dev, "Can't allocate msm_pinctrl\n"); return -ENOMEM; Loading Loading @@ -1570,6 +1620,7 @@ int msm_pinctrl_probe(struct platform_device *pdev, platform_set_drvdata(pdev, pctrl); register_syscore_ops(&msm_pinctrl_pm_ops); dev_dbg(&pdev->dev, "Probed Qualcomm pinctrl driver\n"); return 0; Loading @@ -1583,6 +1634,7 @@ int msm_pinctrl_remove(struct platform_device *pdev) gpiochip_remove(&pctrl->chip); unregister_restart_handler(&pctrl->restart_nb); unregister_syscore_ops(&msm_pinctrl_pm_ops); return 0; } Loading
drivers/pinctrl/qcom/pinctrl-msm.h +6 −0 Original line number Diff line number Diff line Loading @@ -174,4 +174,10 @@ int msm_pinctrl_probe(struct platform_device *pdev, const struct msm_pinctrl_soc_data *soc_data); int msm_pinctrl_remove(struct platform_device *pdev); #ifdef CONFIG_QCOM_SHOW_RESUME_IRQ extern int msm_show_resume_irq_mask; #else #define msm_show_resume_irq_mask 0 #endif #endif