drivers: soc: qcom: fix register names on ARM64

gcc apparently lets you use r0, r1, etc. as register names even in
aarch64 mode.  clang does not.

This change has no impact on the code generated by gcc (confirmed by
disassembling scm.o with and without the patch).

Bug: 67861121
Change-Id: I452ab49963a1b0504ec3e1a7f7be857c75dd8c4d
Signed-off-by: Greg Hackmann <ghackmann@google.com>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>