drm/msm/dsi-staging: update default phy clock params
Reset clk_zero of phy_clk_params to Zero for DSI PHY v3.0.
Change-Id: Ifb2e210d1a3b41aa018ec8b187f21dbc2eebf6b3
Signed-off-by:
Narender Ankam <nankam@codeaurora.org>
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