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Commit 113aefd1 authored by Lloyd Atkinson's avatar Lloyd Atkinson
Browse files

drm/msm: add register dumping facility to sde debug 



Need the capability to dump the content of sde registers during
panic and other scenarios. Add debugfs facility for triggering
register dumping. Add registration of sde and vbif as base
hardware blocks. Add the blocks within the sde as named register
dumping ranges.

CRs-Fixed: 2005394
Change-Id: I410c4e5270447d4d3a8364287fa61748ead5410f
Signed-off-by: default avatarLloyd Atkinson <latkinso@codeaurora.org>
parent 77158731

drivers/gpu/drm/msm/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -46,6 +46,7 @@ msm_drm-y := \ 
	sde/sde_backlight.o \

	sde/sde_color_processing.o \

	sde/sde_vbif.o \

	sde_dbg.o \

	sde_dbg_evtlog.o \

	sde_io_util.o \

	sde/sde_hw_reg_dma_v1_color_proc.o \

drivers/gpu/drm/msm/msm_drv.c

+13 −3
Original line number Diff line number Diff line
@@ -291,7 +291,7 @@ static int msm_drm_uninit(struct device *dev) 
			       priv->vram.paddr, attrs);

	}



	sde_evtlog_destroy();

	sde_dbg_destroy();



	sde_power_client_destroy(&priv->phandle, priv->pclient);

	sde_power_resource_deinit(pdev, &priv->phandle);
@@ -433,12 +433,18 @@ static int msm_component_bind_all(struct device *dev, 
}

#endif



static int msm_power_enable_wrapper(void *handle, void *client, bool enable)

{

	return sde_power_resource_enable(handle, client, enable);

}



static int msm_drm_init(struct device *dev, struct drm_driver *drv)

{

	struct platform_device *pdev = to_platform_device(dev);

	struct drm_device *ddev;

	struct msm_drm_private *priv;

	struct msm_kms *kms;

	struct sde_dbg_power_ctrl dbg_power_ctrl = { 0 };

	int ret, i;



	ddev = drm_dev_alloc(drv, dev);
@@ -499,9 +505,13 @@ static int msm_drm_init(struct device *dev, struct drm_driver *drv) 
	if (ret)

		goto fail;



	ret = sde_evtlog_init(ddev->primary->debugfs_root);

	dbg_power_ctrl.handle = &priv->phandle;

	dbg_power_ctrl.client = priv->pclient;

	dbg_power_ctrl.enable_fn = msm_power_enable_wrapper;

	ret = sde_dbg_init(ddev->primary->debugfs_root, &pdev->dev,

			&dbg_power_ctrl);

	if (ret) {

		dev_err(dev, "failed to init evtlog: %d\n", ret);

		dev_err(dev, "failed to init sde dbg: %d\n", ret);

		goto fail;

	}

drivers/gpu/drm/msm/sde/sde_hw_cdm.c

+4 −1
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ 
#include "sde_hwio.h"

#include "sde_hw_catalog.h"

#include "sde_hw_cdm.h"

#include "sde_dbg.h"



#define CDM_CSC_10_OPMODE                  0x000

#define CDM_CSC_10_BASE                    0x004
@@ -66,7 +67,6 @@ static struct sde_cdm_cfg *_cdm_offset(enum sde_cdm cdm, 
		if (cdm == m->cdm[i].id) {

			b->base_off = addr;

			b->blk_off = m->cdm[i].base;

			b->length = m->cdm[i].len;

			b->hwversion = m->hwversion;

			b->log_mask = SDE_DBG_MASK_CDM;

			return &m->cdm[i];
@@ -315,6 +315,9 @@ struct sde_hw_cdm *sde_hw_cdm_init(enum sde_cdm idx, 
	_setup_cdm_ops(&c->ops, c->cdm_hw_cap->features);

	c->hw_mdp = hw_mdp;



	sde_dbg_reg_register_dump_range(SDE_DBG_NAME, cfg->name, c->hw.blk_off,

			c->hw.blk_off + c->hw.length, c->hw.xin_id);



	return c;

}

drivers/gpu/drm/msm/sde/sde_hw_ctl.c

+4 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 
#include <linux/delay.h>

#include "sde_hwio.h"

#include "sde_hw_ctl.h"

#include "sde_dbg.h"



#define   CTL_LAYER(lm)                 \

	(((lm) == LM_5) ? (0x024) : (((lm) - LM_0) * 0x004))
@@ -490,6 +491,9 @@ struct sde_hw_ctl *sde_hw_ctl_init(enum sde_ctl idx, 
	c->mixer_count = m->mixer_count;

	c->mixer_hw_caps = m->mixer;



	sde_dbg_reg_register_dump_range(SDE_DBG_NAME, cfg->name, c->hw.blk_off,

			c->hw.blk_off + c->hw.length, c->hw.xin_id);



	return c;

}

drivers/gpu/drm/msm/sde/sde_hw_dspp.c

+4 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ 
#include "sde_hw_catalog.h"

#include "sde_hw_dspp.h"

#include "sde_hw_color_processing.h"

#include "sde_dbg.h"



static struct sde_dspp_cfg *_dspp_offset(enum sde_dspp dspp,

		struct sde_mdss_cfg *m,
@@ -123,6 +124,9 @@ struct sde_hw_dspp *sde_hw_dspp_init(enum sde_dspp idx, 
	c->cap = cfg;

	_setup_dspp_ops(c, c->cap->features);



	sde_dbg_reg_register_dump_range(SDE_DBG_NAME, cfg->name, c->hw.blk_off,

			c->hw.blk_off + c->hw.length, c->hw.xin_id);



	return c;

}