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Commit 0d49d47b authored by Dhaval Patel's avatar Dhaval Patel Committed by Narendra Muppalla
Browse files

clk: msm: mdss: update pll ldo configuration for 8996 v2



msm8996 v2 pll needs different ldo configuration in DSI
pll compared to v1 target. This changes updates the DSI
pll driver to support this new configuration.

Change-Id: Idccfad2e388273a15b45a0e8bb822513fcbbe70e
Signed-off-by: default avatarDhaval Patel <pdhaval@codeaurora.org>
parent 7879c157
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+9 −4
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@

#define DSI_PLL_POLL_MAX_READS                  15
#define DSI_PLL_POLL_TIMEOUT_US                 1000
#define MSM8996_DSI_PLL_REVISION_2		2

int set_mdss_byte_mux_sel_8996(struct mux_clk *clk, int sel)
{
@@ -335,13 +336,15 @@ static void mdss_dsi_pll_8996_input_init(struct dsi_pll_db *pdb)
}

static void pll_8996_dec_frac_calc(struct dsi_pll_db *pdb,
			 s64 vco_clk_rate, s64 fref)
	struct mdss_pll_resources *pll)
{
	struct dsi_pll_input *pin = &pdb->in;
	struct dsi_pll_output *pout = &pdb->out;
	s64 multiplier = BIT(20);
	s64 dec_start_multiple, dec_start, pll_comp_val;
	s32 duration, div_frac_start;
	s64 vco_clk_rate = pll->vco_current_rate;
	s64 fref = pll->vco_ref_clk_rate;

	pr_debug("vco_clk_rate=%lld ref_clk_rate=%lld\n",
				vco_clk_rate, fref);
@@ -370,6 +373,9 @@ static void pll_8996_dec_frac_calc(struct dsi_pll_db *pdb,
	pout->plllock_cmp = (u32)pll_comp_val;

	pout->pll_txclk_en = 1;
	if (pll->revision == MSM8996_DSI_PLL_REVISION_2)
		pout->cmn_ldo_cntrl = 0x3c;
	else
		pout->cmn_ldo_cntrl = 0x1c;
}

@@ -607,8 +613,7 @@ int pll_vco_set_rate_8996(struct clk *c, unsigned long rate)

	mdss_dsi_pll_8996_input_init(pdb);

	pll_8996_dec_frac_calc(pdb, pll->vco_current_rate,
					pll->vco_ref_clk_rate);
	pll_8996_dec_frac_calc(pdb, pll);

	pll_8996_calc_vco_count(pdb, pll->vco_current_rate,
					pll->vco_ref_clk_rate);
+6 −0
Original line number Diff line number Diff line
@@ -130,6 +130,11 @@ static int mdss_pll_resource_parse(struct platform_device *pdev,
	if (!strcmp(compatible_stream, "qcom,mdss_dsi_pll_8996")) {
		pll_res->pll_interface_type = MDSS_DSI_PLL_8996;
		pll_res->target_id = MDSS_PLL_TARGET_8996;
		pll_res->revision = 1;
	} else if (!strcmp(compatible_stream, "qcom,mdss_dsi_pll_8996_v2")) {
		pll_res->pll_interface_type = MDSS_DSI_PLL_8996;
		pll_res->target_id = MDSS_PLL_TARGET_8996;
		pll_res->revision = 2;
	} else if (!strcmp(compatible_stream, "qcom,mdss_hdmi_pll_8996")) {
		pll_res->pll_interface_type = MDSS_HDMI_PLL_8996;
	} else {
@@ -334,6 +339,7 @@ static int mdss_pll_remove(struct platform_device *pdev)

static const struct of_device_id mdss_pll_dt_match[] = {
	{.compatible = "qcom,mdss_dsi_pll_8996"},
	{.compatible = "qcom,mdss_dsi_pll_8996_v2"},
	{.compatible = "qcom,mdss_hdmi_pll_8996"},
	{}
};
+5 −0
Original line number Diff line number Diff line
@@ -128,6 +128,11 @@ struct mdss_pll_resources {

	struct mdss_pll_resources *slave;

	/*
	 * target pll revision information
	 */
	int		revision;

	void *priv;
};