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Commit 0c3bd83b authored by Thomas Horsten's avatar Thomas Horsten Committed by Ralf Baechle
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[MIPS] Lasat: bring back from the dead



After the common MIPS CPU interrupt controller (for irq0-7) was introduced
the Lasat boards didn't get their interrupts right, so nothing worked. The
old routines need to be offset by the new 8 hardware interrupts common to
all MIPS CPU's.

Signed-off-by: default avatarThomas Horsten <thomas@horsten.com>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent d6c3048c
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+2 −0
Original line number Original line Diff line number Diff line
@@ -34,11 +34,13 @@ static volatile int lasat_int_mask_shift;


void disable_lasat_irq(unsigned int irq_nr)
void disable_lasat_irq(unsigned int irq_nr)
{
{
	irq_nr -= LASAT_IRQ_BASE;
	*lasat_int_mask &= ~(1 << irq_nr) << lasat_int_mask_shift;
	*lasat_int_mask &= ~(1 << irq_nr) << lasat_int_mask_shift;
}
}


void enable_lasat_irq(unsigned int irq_nr)
void enable_lasat_irq(unsigned int irq_nr)
{
{
	irq_nr -= LASAT_IRQ_BASE;
	*lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift;
	*lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift;
}
}


+2 −2
Original line number Original line Diff line number Diff line
@@ -4,10 +4,10 @@
#define LASAT_BASE_BAUD_100 		(7372800 / 16)
#define LASAT_BASE_BAUD_100 		(7372800 / 16)
#define LASAT_UART_REGS_BASE_100	0x1c8b0000
#define LASAT_UART_REGS_BASE_100	0x1c8b0000
#define LASAT_UART_REGS_SHIFT_100	2
#define LASAT_UART_REGS_SHIFT_100	2
#define LASATINT_UART_100		8
#define LASATINT_UART_100		16


/* * LASAT 200 boards serial configuration */
/* * LASAT 200 boards serial configuration */
#define LASAT_BASE_BAUD_200		(100000000 / 16 / 12)
#define LASAT_BASE_BAUD_200		(100000000 / 16 / 12)
#define LASAT_UART_REGS_BASE_200	(Vrc5074_PHYS_BASE + 0x0300)
#define LASAT_UART_REGS_BASE_200	(Vrc5074_PHYS_BASE + 0x0300)
#define LASAT_UART_REGS_SHIFT_200	3
#define LASAT_UART_REGS_SHIFT_200	3
#define LASATINT_UART_200		13
#define LASATINT_UART_200		21