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Commit 095635be authored by Shanker Donthineni's avatar Shanker Donthineni Committed by Greg Kroah-Hartman
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irqchip/gicv3-its: Add workaround for QDF2400 ITS erratum 0065 



commit 90922a2d03d84de36bf8a9979d62580102f31a92 upstream.

On Qualcomm Datacenter Technologies QDF2400 SoCs, the ITS hardware
implementation uses 16Bytes for Interrupt Translation Entry (ITE),
but reports an incorrect value of 8Bytes in GITS_TYPER.ITTE_size.

It might cause kernel memory corruption depending on the number
of MSI(x) that are configured and the amount of memory that has
been allocated for ITEs in its_create_device().

This patch fixes the potential memory corruption by setting the
correct ITE size to 16Bytes.

Cc: stable@vger.kernel.org
Signed-off-by: default avatarShanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 61e79860

Documentation/arm64/silicon-errata.txt

+23 −21
Original line number Diff line number Diff line
@@ -43,7 +43,7 @@ will be updated when new workarounds are committed and backported to 
stable kernels.



| Implementor    | Component       | Erratum ID      | Kconfig                     |

+----------------+-----------------+-----------------+-------------------------+

+----------------+-----------------+-----------------+-----------------------------+

| ARM            | Cortex-A53      | #826319         | ARM64_ERRATUM_826319        |

| ARM            | Cortex-A53      | #827319         | ARM64_ERRATUM_827319        |

| ARM            | Cortex-A53      | #824069         | ARM64_ERRATUM_824069        |
@@ -63,3 +63,5 @@ stable kernels. 
| Cavium         | ThunderX SMMUv2 | #27704          | N/A                         |

|                |                 |                 |                             |

| Freescale/NXP  | LS2080A/LS1043A | A-008585        | FSL_ERRATUM_A008585         |

|                |                 |                 |                             |

| Qualcomm Tech. | QDF2400 ITS     | E0065           | QCOM_QDF2400_ERRATUM_0065   |

arch/arm64/Kconfig

+10 −0
Original line number Diff line number Diff line
@@ -474,6 +474,16 @@ config CAVIUM_ERRATUM_27456 


	  If unsure, say Y.



config QCOM_QDF2400_ERRATUM_0065

	bool "QDF2400 E0065: Incorrect GITS_TYPER.ITT_Entry_size"

	default y

	help

	  On Qualcomm Datacenter Technologies QDF2400 SoC, ITS hardware reports

	  ITE size incorrectly. The GITS_TYPER.ITT_Entry_size field should have

	  been indicated as 16Bytes (0xf), not 8Bytes (0x7).



	  If unsure, say Y.



endmenu

drivers/irqchip/irq-gic-v3-its.c

+16 −0
Original line number Diff line number Diff line
@@ -1598,6 +1598,14 @@ static void __maybe_unused its_enable_quirk_cavium_23144(void *data) 
	its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144;

}



static void __maybe_unused its_enable_quirk_qdf2400_e0065(void *data)

{

	struct its_node *its = data;



	/* On QDF2400, the size of the ITE is 16Bytes */

	its->ite_size = 16;

}



static const struct gic_quirk its_quirks[] = {

#ifdef CONFIG_CAVIUM_ERRATUM_22375

	{
@@ -1614,6 +1622,14 @@ static const struct gic_quirk its_quirks[] = { 
		.mask	= 0xffff0fff,

		.init	= its_enable_quirk_cavium_23144,

	},

#endif

#ifdef CONFIG_QCOM_QDF2400_ERRATUM_0065

	{

		.desc	= "ITS: QDF2400 erratum 0065",

		.iidr	= 0x00001070, /* QDF2400 ITS rev 1.x */

		.mask	= 0xffffffff,

		.init	= its_enable_quirk_qdf2400_e0065,

	},

#endif

	{

	}