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Commit 03854df8 authored by Mohammed Javid's avatar Mohammed Javid
Browse files

msm: ipa: wdi: Add a boolean flag to represent wdi tx over pcie 



WLAN TX CE Door Bell register may over pcie or DDR.

If SMMU S1 is enabled and CE DB register is over PCIe bus,
then assign the physical address directly instead of
SMMU's Intermediate physical address.

Because, IPA PCIe master port does not go through SMMU.

Change-Id: I4a7ed4e1e63bd08b7fe37c676d411feaad48257a
Signed-off-by: default avatarMohammed Javid <mjavid@codeaurora.org>
parent eddc683b

Documentation/devicetree/bindings/platform/msm/ipa.txt

+2 −0
Original line number Diff line number Diff line
@@ -87,6 +87,8 @@ memory allocation over a PCIe bridge 
                                need to be unlocked by TZ.

- qcom,ipa-uc-monitor-holb:   	Boolean context flag to indicate whether

                                monitoring of holb via IPA uc is required.

- qcom,wlan-ce-db-over-pcie: Boolean context flag to represent WLAN CE DB

				over pcie bus or not.



IPA pipe sub nodes (A2 static pipes configurations):

drivers/platform/msm/ipa/ipa_v3/ipa.c

+7 −0
Original line number Diff line number Diff line
@@ -5038,6 +5038,7 @@ static int ipa3_pre_init(const struct ipa3_plat_drv_res *resource_p, 
	ipa3_ctx->apply_rg10_wa = resource_p->apply_rg10_wa;

	ipa3_ctx->gsi_ch20_wa = resource_p->gsi_ch20_wa;

	ipa3_ctx->use_ipa_pm = resource_p->use_ipa_pm;

	ipa3_ctx->wdi_over_pcie = resource_p->wdi_over_pcie;

	ipa3_ctx->ipa3_active_clients_logging.log_rdy = false;

	ipa3_ctx->ipa_config_is_mhi = resource_p->ipa_mhi_dynamic_config;

	ipa3_ctx->mhi_evid_limits[0] = resource_p->mhi_evid_limits[0];
@@ -5869,6 +5870,12 @@ static int get_ipa_dts_configuration(struct platform_device *pdev, 
		return result;

	}



	ipa_drv_res->wdi_over_pcie =

			of_property_read_bool(pdev->dev.of_node,

			"qcom,wlan-ce-db-over-pcie");

	IPADBG("Is wdi_over_pcie ? (%s)\n",

				ipa3_ctx->wdi_over_pcie ? "Yes":"No");



	/*

	 * If we're on emulator, get its interrupt controller's mem

	 * start and size

drivers/platform/msm/ipa/ipa_v3/ipa_i.h

+2 −0
Original line number Diff line number Diff line
@@ -1604,6 +1604,7 @@ struct ipa3_context { 
	struct mutex ipa_cne_evt_lock;

	bool use_ipa_pm;

	bool vlan_mode_iface[IPA_VLAN_IF_MAX];

	bool wdi_over_pcie;

};



struct ipa3_plat_drv_res {
@@ -1638,6 +1639,7 @@ struct ipa3_plat_drv_res { 
	struct ipa_tz_unlock_reg_info *ipa_tz_unlock_reg;

	bool use_ipa_pm;

	struct ipa_pm_init_params pm_init;

	bool wdi_over_pcie;

};



/**

drivers/platform/msm/ipa/ipa_v3/ipa_uc_wdi.c

+93 −46
Original line number Diff line number Diff line
@@ -756,18 +756,23 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, 
		return -EINVAL;

	}



	if (!in->smmu_enabled) {

		if (IPA_CLIENT_IS_CONS(in->sys.client)) {

		if (in->u.dl.comp_ring_base_pa % IPA_WDI_RING_ALIGNMENT ||

			in->u.dl.ce_ring_base_pa % IPA_WDI_RING_ALIGNMENT) {

			if (in->u.dl.comp_ring_base_pa %

				IPA_WDI_RING_ALIGNMENT ||

				in->u.dl.ce_ring_base_pa %

				IPA_WDI_RING_ALIGNMENT) {

				IPAERR("alignment failure on TX\n");

					return -EINVAL;

			}

		} else {

		if (in->u.ul.rdy_ring_base_pa % IPA_WDI_RING_ALIGNMENT) {

			if (in->u.ul.rdy_ring_base_pa %

				IPA_WDI_RING_ALIGNMENT) {

				IPAERR("alignment failure on RX\n");

				return -EINVAL;

			}

		}

	}



	result = ipa3_uc_state_check();

	if (result)
@@ -795,19 +800,48 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, 
			cmd.size = sizeof(*tx_2);

		else

			cmd.size = sizeof(*tx);

		if (in->smmu_enabled) {

			IPADBG("comp_ring_size=%d\n",

				in->u.dl_smmu.comp_ring_size);

			IPADBG("ce_ring_size=%d\n", in->u.dl_smmu.ce_ring_size);

			IPADBG("ce_ring_doorbell_pa=0x%pa\n",

					&in->u.dl_smmu.ce_door_bell_pa);

			IPADBG("num_tx_buffers=%d\n",

				in->u.dl_smmu.num_tx_buffers);

		} else {

			IPADBG("comp_ring_base_pa=0x%pa\n",

					&in->u.dl.comp_ring_base_pa);

			IPADBG("comp_ring_size=%d\n", in->u.dl.comp_ring_size);

		IPADBG("ce_ring_base_pa=0x%pa\n", &in->u.dl.ce_ring_base_pa);

			IPADBG("ce_ring_base_pa=0x%pa\n",

				&in->u.dl.ce_ring_base_pa);

			IPADBG("ce_ring_size=%d\n", in->u.dl.ce_ring_size);

			IPADBG("ce_ring_doorbell_pa=0x%pa\n",

					&in->u.dl.ce_door_bell_pa);

			IPADBG("num_tx_buffers=%d\n", in->u.dl.num_tx_buffers);

		}

	} else {

		if (ipa3_ctx->ipa_wdi2)

			cmd.size = sizeof(*rx_2);

		else

			cmd.size = sizeof(*rx);

		if (in->smmu_enabled) {

			IPADBG("rx_ring_size=%d\n",

				in->u.ul_smmu.rdy_ring_size);

			IPADBG("rx_ring_rp_pa=0x%pa\n",

				&in->u.ul_smmu.rdy_ring_rp_pa);

			IPADBG("rx_comp_ring_size=%d\n",

				in->u.ul_smmu.rdy_comp_ring_size);

			IPADBG("rx_comp_ring_wp_pa=0x%pa\n",

				&in->u.ul_smmu.rdy_comp_ring_wp_pa);

			ipa3_ctx->uc_ctx.rdy_ring_rp_pa =

				in->u.ul_smmu.rdy_ring_rp_pa;

			ipa3_ctx->uc_ctx.rdy_ring_size =

				in->u.ul_smmu.rdy_ring_size;

			ipa3_ctx->uc_ctx.rdy_comp_ring_wp_pa =

				in->u.ul_smmu.rdy_comp_ring_wp_pa;

			ipa3_ctx->uc_ctx.rdy_comp_ring_size =

				in->u.ul_smmu.rdy_comp_ring_size;

		} else {

			IPADBG("rx_ring_base_pa=0x%pa\n",

				&in->u.ul.rdy_ring_base_pa);

			IPADBG("rx_ring_size=%d\n",
@@ -833,6 +867,7 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, 
			ipa3_ctx->uc_ctx.rdy_comp_ring_size =

				in->u.ul.rdy_comp_ring_size;

		}

	}



	cmd.base = dma_alloc_coherent(ipa3_ctx->uc_pdev, cmd.size,

			&cmd.phys_base, GFP_KERNEL);
@@ -945,10 +980,11 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, 
			tx->comp_ring_size = len;

			len = in->smmu_enabled ? in->u.dl_smmu.ce_ring_size :

				in->u.dl.ce_ring_size;

			IPADBG("TX CE ring smmu_en=%d ring_size=%d %d\n",

			IPADBG("TX CE ring smmu_en=%d ring_size=%d %d 0x%lx\n",

					in->smmu_enabled,

					in->u.dl_smmu.ce_ring_size,

					in->u.dl.ce_ring_size);

					in->u.dl.ce_ring_size,

					va);

			if (ipa_create_uc_smmu_mapping(IPA_WDI_CE_RING_RES,

						in->smmu_enabled,

						in->u.dl.ce_ring_base_pa,
@@ -975,8 +1011,19 @@ int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, 
				result = -ENOMEM;

				goto uc_timeout;

			}



			IPADBG("CE doorbell pa: 0x%pa va:0x%lx\n", &pa, va);

			IPADBG("Is wdi_over_pcie ? (%s)\n",

				ipa3_ctx->wdi_over_pcie ? "Yes":"No");



			if (ipa3_ctx->wdi_over_pcie)

				tx->ce_ring_doorbell_pa = pa;

			else

				tx->ce_ring_doorbell_pa = va;

			tx->num_tx_buffers = in->u.dl.num_tx_buffers;



			tx->num_tx_buffers = in->smmu_enabled ?

				in->u.dl_smmu.num_tx_buffers :

				in->u.dl.num_tx_buffers;

			tx->ipa_pipe_number = ipa_ep_idx;

		}

		out->uc_door_bell_pa = ipa3_ctx->ipa_wrapper_base +