Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Skip to content
Commit 0161cd79 authored by Veerabhadrarao Badiganti's avatar Veerabhadrarao Badiganti Committed by Gerrit - the friendly Code Review server
Browse files

ARM: dts: msm: Vote for bus_aggr_clk clock by eMMC and UFS on sdm710



Updated gcc_aggre_ufs_phy_axi_clk clock node in eMMC & UFS device node
with corresponding voter clock node, so that both these drivers can
vote for this clock.

On SDM710, both eMMC & UFS drivers need gcc_aggre_ufs_phy_axi_clk for
their respective functionality. So both the drivers should vote this
clock to ensure this clock is enabled while driver is being accessed.

Change-Id: I19df15e24f91951ae2103c18246c98a7d26e36db
Signed-off-by: default avatarVeerabhadrarao Badiganti <vbadigan@codeaurora.org>
parent 6ca3ebee
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment