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Commit d55f0adf authored by Carl Shapiro's avatar Carl Shapiro
Browse files

Qualify the source argument of atomic loads as a const pointer.

Also normalizes the opening brace placment in a few locations.

Change-Id: I8f518e933094337d5d3371321326ffc03b3a5f5a
parent f62b23f2
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+6 −4
Original line number Diff line number Diff line
@@ -49,14 +49,14 @@ extern inline void android_memory_barrier(void)
}
#endif

extern inline int32_t android_atomic_acquire_load(volatile int32_t *ptr)
extern inline int32_t android_atomic_acquire_load(volatile const int32_t *ptr)
{
    int32_t value = *ptr;
    android_memory_barrier();
    return value;
}

extern inline int32_t android_atomic_release_load(volatile int32_t *ptr)
extern inline int32_t android_atomic_release_load(volatile const int32_t *ptr)
{
    android_memory_barrier();
    return *ptr;
@@ -196,11 +196,13 @@ extern inline int32_t android_atomic_add(int32_t increment,
}
#endif

extern inline int32_t android_atomic_inc(volatile int32_t *addr) {
extern inline int32_t android_atomic_inc(volatile int32_t *addr)
{
    return android_atomic_add(1, addr);
}

extern inline int32_t android_atomic_dec(volatile int32_t *addr) {
extern inline int32_t android_atomic_dec(volatile int32_t *addr)
{
    return android_atomic_add(-1, addr);
}

+12 −6
Original line number Diff line number Diff line
@@ -36,25 +36,29 @@ extern inline void android_memory_barrier(void)
}
#endif

extern inline int32_t android_atomic_acquire_load(volatile int32_t *ptr) {
extern inline int32_t android_atomic_acquire_load(volatile const int32_t *ptr)
{
    int32_t value = *ptr;
    android_compiler_barrier();
    return value;
}

extern inline int32_t android_atomic_release_load(volatile int32_t *ptr) {
extern inline int32_t android_atomic_release_load(volatile const int32_t *ptr)
{
    android_memory_barrier();
    return *ptr;
}

extern inline void android_atomic_acquire_store(int32_t value,
                                                volatile int32_t *ptr) {
                                                volatile int32_t *ptr)
{
    *ptr = value;
    android_memory_barrier();
}

extern inline void android_atomic_release_store(int32_t value,
                                                volatile int32_t *ptr) {
                                                volatile int32_t *ptr)
{
    android_compiler_barrier();
    *ptr = value;
}
@@ -107,11 +111,13 @@ extern inline int32_t android_atomic_add(int32_t increment,
    return increment;
}

extern inline int32_t android_atomic_inc(volatile int32_t *addr) {
extern inline int32_t android_atomic_inc(volatile int32_t *addr)
{
    return android_atomic_add(1, addr);
}

extern inline int32_t android_atomic_dec(volatile int32_t *addr) {
extern inline int32_t android_atomic_dec(volatile int32_t *addr)
{
    return android_atomic_add(-1, addr);
}

+2 −2
Original line number Diff line number Diff line
@@ -77,8 +77,8 @@ int32_t android_atomic_or(int32_t value, volatile int32_t* addr);
 * This is only necessary if you need the memory barrier.  A 32-bit read
 * from a 32-bit aligned address is atomic on all supported platforms.
 */
int32_t android_atomic_acquire_load(volatile int32_t* addr);
int32_t android_atomic_release_load(volatile int32_t* addr);
int32_t android_atomic_acquire_load(volatile const int32_t* addr);
int32_t android_atomic_release_load(volatile const int32_t* addr);

/*
 * Perform an atomic store with "acquire" or "release" ordering.
+2 −2
Original line number Diff line number Diff line
@@ -49,12 +49,12 @@ static pthread_mutex_t _swap_locks[SWAP_LOCK_COUNT];
   &_swap_locks[((unsigned)(void*)(addr) >> 3U) % SWAP_LOCK_COUNT]


int32_t android_atomic_acquire_load(volatile int32_t* addr)
int32_t android_atomic_acquire_load(volatile const int32_t* addr)
{
    return *addr;
}

int32_t android_atomic_release_load(volatile int32_t* addr)
int32_t android_atomic_release_load(volatile const int32_t* addr)
{
    return *addr;
}