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Commit d05f1d51 authored by Elliott Hughes's avatar Elliott Hughes
Browse files

Remove dead code. 

Intel accidentally made this dead code in 2010 with commit
2bef93cc, and no one's ever noticed.

Since no one noticing for so long implies that it doesn't matter,
let's just kill the supposedly optimized code.

Change-Id: Id5b37056cb8884c20bfe2db362e19b46f02e337d
parent 6855af41

libpixelflinger/codeflinger/load_store.cpp

+0 −19
Original line number Diff line number Diff line
@@ -20,10 +20,6 @@ 
#include <cutils/log.h>

#include "GGLAssembler.h"



#ifdef __ARM_ARCH__

#include <machine/cpu-features.h>

#endif



namespace android {



// ----------------------------------------------------------------------------
@@ -117,20 +113,6 @@ void GGLAssembler::extract(integer_t& d, int s, int h, int l, int bits) 
#endif

    assert(h);

    

#if __ARM_ARCH__ >= 7

    const int mask = (1<<maskLen)-1;

    if ((h == bits) && !l && (s != d.reg)) {

        MOV(AL, 0, d.reg, s);                   // component = packed;

    } else if ((h == bits) && l) {

        MOV(AL, 0, d.reg, reg_imm(s, LSR, l));  // component = packed >> l;

    } else if (!l && isValidImmediate(mask)) {

        AND(AL, 0, d.reg, s, imm(mask));        // component = packed & mask;

    } else if (!l && isValidImmediate(~mask)) {

        BIC(AL, 0, d.reg, s, imm(~mask));       // component = packed & mask;

    } else {

        UBFX(AL, d.reg, s, l, maskLen);         // component = (packed & mask) >> l;

    }

#else

    if (h != bits) {

        const int mask = ((1<<maskLen)-1) << l;

        if (isValidImmediate(mask)) {
@@ -153,7 +135,6 @@ void GGLAssembler::extract(integer_t& d, int s, int h, int l, int bits) 
    if (s != d.reg) {

        MOV(AL, 0, d.reg, s);

    }

#endif



    d.s = maskLen;

}

libpixelflinger/codeflinger/texturing.cpp

+0 −105
Original line number Diff line number Diff line
@@ -25,10 +25,6 @@ 


#include "GGLAssembler.h"



#ifdef __ARM_ARCH__

#include <machine/cpu-features.h>

#endif



namespace android {



// ---------------------------------------------------------------------------
@@ -888,106 +884,6 @@ void GGLAssembler::filter24( 
    load(txPtr, texel, 0);

}



#if __ARM_ARCH__ >= 6

// ARMv6 version, using UXTB16, and scheduled for Cortex-A8 pipeline

void GGLAssembler::filter32(

        const fragment_parts_t& parts,

        pixel_t& texel, const texture_unit_t& tmu,

        int U, int V, pointer_t& txPtr,

        int FRAC_BITS)

{

    const int adjust = FRAC_BITS*2 - 8;

    const int round  = 0;

    const int prescale = 16 - adjust;



    Scratch scratches(registerFile());

    

    int pixel= scratches.obtain();

    int dh   = scratches.obtain();

    int u    = scratches.obtain();

    int k    = scratches.obtain();



    int temp = scratches.obtain();

    int dl   = scratches.obtain();



    int offsetrt = scratches.obtain();

    int offsetlb = scratches.obtain();



    int pixellb = offsetlb;



    // RB -> U * V

    CONTEXT_LOAD(offsetrt, generated_vars.rt);

    CONTEXT_LOAD(offsetlb, generated_vars.lb);

    if(!round) {

        MOV(AL, 0, U, reg_imm(U, LSL, prescale));

    }

    ADD(AL, 0, u, offsetrt, offsetlb);



    LDR(AL, pixel, txPtr.reg, reg_scale_pre(u));

    if (round) {

        SMULBB(AL, u, U, V);

        RSB(AL, 0, U, U, imm(1<<FRAC_BITS));

    } else {

        SMULWB(AL, u, U, V);

        RSB(AL, 0, U, U, imm(1<<(FRAC_BITS+prescale)));

    }

    UXTB16(AL, temp, pixel, 0);

    if (round) {

        ADD(AL, 0, u, u, imm(1<<(adjust-1)));

        MOV(AL, 0, u, reg_imm(u, LSR, adjust));

    }

    LDR(AL, pixellb, txPtr.reg, reg_scale_pre(offsetlb));

    MUL(AL, 0, dh, temp, u);

    UXTB16(AL, temp, pixel, 8);

    MUL(AL, 0, dl, temp, u);

    RSB(AL, 0, k, u, imm(0x100));



    // LB -> (1-U) * V

    if (round) {

        SMULBB(AL, u, U, V);

    } else {

        SMULWB(AL, u, U, V);

    }

    UXTB16(AL, temp, pixellb, 0);

    if (round) {

        ADD(AL, 0, u, u, imm(1<<(adjust-1)));

        MOV(AL, 0, u, reg_imm(u, LSR, adjust));

    }

    MLA(AL, 0, dh, temp, u, dh);    

    UXTB16(AL, temp, pixellb, 8);

    MLA(AL, 0, dl, temp, u, dl);

    SUB(AL, 0, k, k, u);



    // LT -> (1-U)*(1-V)

    RSB(AL, 0, V, V, imm(1<<FRAC_BITS));

    LDR(AL, pixel, txPtr.reg);

    if (round) {

        SMULBB(AL, u, U, V);

    } else {

        SMULWB(AL, u, U, V);

    }

    UXTB16(AL, temp, pixel, 0);

    if (round) {

        ADD(AL, 0, u, u, imm(1<<(adjust-1)));

        MOV(AL, 0, u, reg_imm(u, LSR, adjust));

    }

    MLA(AL, 0, dh, temp, u, dh);    

    UXTB16(AL, temp, pixel, 8);

    MLA(AL, 0, dl, temp, u, dl);



    // RT -> U*(1-V)            

    LDR(AL, pixel, txPtr.reg, reg_scale_pre(offsetrt));

    SUB(AL, 0, u, k, u);

    UXTB16(AL, temp, pixel, 0);

    MLA(AL, 0, dh, temp, u, dh);    

    UXTB16(AL, temp, pixel, 8);

    MLA(AL, 0, dl, temp, u, dl);



    UXTB16(AL, dh, dh, 8);

    UXTB16(AL, dl, dl, 8);

    ORR(AL, 0, texel.reg, dh, reg_imm(dl, LSL, 8));

}

#else

void GGLAssembler::filter32(

        const fragment_parts_t& /*parts*/,

        pixel_t& texel, const texture_unit_t& /*tmu*/,
@@ -1075,7 +971,6 @@ void GGLAssembler::filter32( 
    AND(AL, 0, dl, dl, reg_imm(mask, LSL, 8));

    ORR(AL, 0, texel.reg, dh, dl);

}

#endif



void GGLAssembler::build_texture_environment(

        component_t& fragment,