Loading libunwindstack/RegsArm.cpp +6 −7 Original line number Diff line number Diff line Loading @@ -35,26 +35,25 @@ ArchEnum RegsArm::Arch() { return ARCH_ARM; } uint64_t RegsArm::GetAdjustedPc(uint64_t rel_pc, Elf* elf) { uint64_t RegsArm::GetPcAdjustment(uint64_t rel_pc, Elf* elf) { uint64_t load_bias = elf->GetLoadBias(); if (rel_pc < load_bias) { return rel_pc; return 0; } uint64_t adjusted_rel_pc = rel_pc - load_bias; if (adjusted_rel_pc < 5) { return rel_pc; return 0; } if (adjusted_rel_pc & 1) { // This is a thumb instruction, it could be 2 or 4 bytes. uint32_t value; if (rel_pc < 5 || !elf->memory()->ReadFully(adjusted_rel_pc - 5, &value, sizeof(value)) || if (!elf->memory()->ReadFully(adjusted_rel_pc - 5, &value, sizeof(value)) || (value & 0xe000f000) != 0xe000f000) { return rel_pc - 2; return 2; } } return rel_pc - 4; return 4; } void RegsArm::SetFromRaw() { Loading libunwindstack/RegsArm64.cpp +4 −8 Original line number Diff line number Diff line Loading @@ -35,15 +35,11 @@ ArchEnum RegsArm64::Arch() { return ARCH_ARM64; } uint64_t RegsArm64::GetAdjustedPc(uint64_t rel_pc, Elf* elf) { if (!elf->valid()) { return rel_pc; uint64_t RegsArm64::GetPcAdjustment(uint64_t rel_pc, Elf* elf) { if (!elf->valid() || rel_pc < 4) { return 0; } if (rel_pc < 4) { return rel_pc; } return rel_pc - 4; return 4; } void RegsArm64::SetFromRaw() { Loading libunwindstack/RegsMips.cpp +5 −9 Original line number Diff line number Diff line Loading @@ -35,16 +35,12 @@ ArchEnum RegsMips::Arch() { return ARCH_MIPS; } uint64_t RegsMips::GetAdjustedPc(uint64_t rel_pc, Elf* elf) { if (!elf->valid()) { return rel_pc; uint64_t RegsMips::GetPcAdjustment(uint64_t rel_pc, Elf* elf) { if (!elf->valid() || rel_pc < 8) { return 0; } // For now, just assuming no compact branches if (rel_pc < 8) { return rel_pc; } return rel_pc - 8; // For now, just assume no compact branches return 8; } void RegsMips::SetFromRaw() { Loading libunwindstack/RegsMips64.cpp +5 −9 Original line number Diff line number Diff line Loading @@ -36,16 +36,12 @@ ArchEnum RegsMips64::Arch() { return ARCH_MIPS64; } uint64_t RegsMips64::GetAdjustedPc(uint64_t rel_pc, Elf* elf) { if (!elf->valid()) { return rel_pc; uint64_t RegsMips64::GetPcAdjustment(uint64_t rel_pc, Elf* elf) { if (!elf->valid() || rel_pc < 8) { return 0; } // For now, just assuming no compact branches if (rel_pc < 8) { return rel_pc; } return rel_pc - 8; // For now, just assume no compact branches return 8; } void RegsMips64::SetFromRaw() { Loading libunwindstack/RegsX86.cpp +3 −7 Original line number Diff line number Diff line Loading @@ -35,15 +35,11 @@ ArchEnum RegsX86::Arch() { return ARCH_X86; } uint64_t RegsX86::GetAdjustedPc(uint64_t rel_pc, Elf* elf) { if (!elf->valid()) { return rel_pc; } if (rel_pc == 0) { uint64_t RegsX86::GetPcAdjustment(uint64_t rel_pc, Elf* elf) { if (!elf->valid() || rel_pc == 0) { return 0; } return rel_pc - 1; return 1; } void RegsX86::SetFromRaw() { Loading Loading
libunwindstack/RegsArm.cpp +6 −7 Original line number Diff line number Diff line Loading @@ -35,26 +35,25 @@ ArchEnum RegsArm::Arch() { return ARCH_ARM; } uint64_t RegsArm::GetAdjustedPc(uint64_t rel_pc, Elf* elf) { uint64_t RegsArm::GetPcAdjustment(uint64_t rel_pc, Elf* elf) { uint64_t load_bias = elf->GetLoadBias(); if (rel_pc < load_bias) { return rel_pc; return 0; } uint64_t adjusted_rel_pc = rel_pc - load_bias; if (adjusted_rel_pc < 5) { return rel_pc; return 0; } if (adjusted_rel_pc & 1) { // This is a thumb instruction, it could be 2 or 4 bytes. uint32_t value; if (rel_pc < 5 || !elf->memory()->ReadFully(adjusted_rel_pc - 5, &value, sizeof(value)) || if (!elf->memory()->ReadFully(adjusted_rel_pc - 5, &value, sizeof(value)) || (value & 0xe000f000) != 0xe000f000) { return rel_pc - 2; return 2; } } return rel_pc - 4; return 4; } void RegsArm::SetFromRaw() { Loading
libunwindstack/RegsArm64.cpp +4 −8 Original line number Diff line number Diff line Loading @@ -35,15 +35,11 @@ ArchEnum RegsArm64::Arch() { return ARCH_ARM64; } uint64_t RegsArm64::GetAdjustedPc(uint64_t rel_pc, Elf* elf) { if (!elf->valid()) { return rel_pc; uint64_t RegsArm64::GetPcAdjustment(uint64_t rel_pc, Elf* elf) { if (!elf->valid() || rel_pc < 4) { return 0; } if (rel_pc < 4) { return rel_pc; } return rel_pc - 4; return 4; } void RegsArm64::SetFromRaw() { Loading
libunwindstack/RegsMips.cpp +5 −9 Original line number Diff line number Diff line Loading @@ -35,16 +35,12 @@ ArchEnum RegsMips::Arch() { return ARCH_MIPS; } uint64_t RegsMips::GetAdjustedPc(uint64_t rel_pc, Elf* elf) { if (!elf->valid()) { return rel_pc; uint64_t RegsMips::GetPcAdjustment(uint64_t rel_pc, Elf* elf) { if (!elf->valid() || rel_pc < 8) { return 0; } // For now, just assuming no compact branches if (rel_pc < 8) { return rel_pc; } return rel_pc - 8; // For now, just assume no compact branches return 8; } void RegsMips::SetFromRaw() { Loading
libunwindstack/RegsMips64.cpp +5 −9 Original line number Diff line number Diff line Loading @@ -36,16 +36,12 @@ ArchEnum RegsMips64::Arch() { return ARCH_MIPS64; } uint64_t RegsMips64::GetAdjustedPc(uint64_t rel_pc, Elf* elf) { if (!elf->valid()) { return rel_pc; uint64_t RegsMips64::GetPcAdjustment(uint64_t rel_pc, Elf* elf) { if (!elf->valid() || rel_pc < 8) { return 0; } // For now, just assuming no compact branches if (rel_pc < 8) { return rel_pc; } return rel_pc - 8; // For now, just assume no compact branches return 8; } void RegsMips64::SetFromRaw() { Loading
libunwindstack/RegsX86.cpp +3 −7 Original line number Diff line number Diff line Loading @@ -35,15 +35,11 @@ ArchEnum RegsX86::Arch() { return ARCH_X86; } uint64_t RegsX86::GetAdjustedPc(uint64_t rel_pc, Elf* elf) { if (!elf->valid()) { return rel_pc; } if (rel_pc == 0) { uint64_t RegsX86::GetPcAdjustment(uint64_t rel_pc, Elf* elf) { if (!elf->valid() || rel_pc == 0) { return 0; } return rel_pc - 1; return 1; } void RegsX86::SetFromRaw() { Loading