Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit bed58bf3 authored by Elliott Hughes's avatar Elliott Hughes Committed by Android Git Automerger
Browse files

am 536dce31: Merge "Fix compiler warnings in libpixelflinger"

* commit '536dce31':
  Fix compiler warnings in libpixelflinger
parents c0f95624 536dce31
Loading
Loading
Loading
Loading
+2 −2
Original line number Original line Diff line number Diff line
@@ -130,7 +130,7 @@ void read_pixel(const surface_t* s, context_t* c,
    }
    }
}
}


void readRGB565(const surface_t* s, context_t* c,
void readRGB565(const surface_t* s, context_t* /*c*/,
        uint32_t x, uint32_t y, pixel_t* pixel)
        uint32_t x, uint32_t y, pixel_t* pixel)
{
{
    uint16_t v = *(reinterpret_cast<uint16_t*>(s->data) + (x + (s->stride * y)));
    uint16_t v = *(reinterpret_cast<uint16_t*>(s->data) + (x + (s->stride * y)));
@@ -144,7 +144,7 @@ void readRGB565(const surface_t* s, context_t* c,
    pixel->s[3] = 5;
    pixel->s[3] = 5;
}
}


void readABGR8888(const surface_t* s, context_t* c,
void readABGR8888(const surface_t* s, context_t* /*c*/,
        uint32_t x, uint32_t y, pixel_t* pixel)
        uint32_t x, uint32_t y, pixel_t* pixel)
{
{
    uint32_t v = *(reinterpret_cast<uint32_t*>(s->data) + (x + (s->stride * y)));
    uint32_t v = *(reinterpret_cast<uint32_t*>(s->data) + (x + (s->stride * y)));
+32 −32
Original line number Original line Diff line number Diff line
@@ -273,7 +273,7 @@ void ArmToArm64Assembler::B(int cc, const char* label)
    *mPC++ = (0x54 << 24) | cc;
    *mPC++ = (0x54 << 24) | cc;
}
}


void ArmToArm64Assembler::BL(int cc, const char* label)
void ArmToArm64Assembler::BL(int /*cc*/, const char* /*label*/)
{
{
    NOT_IMPLEMENTED(); //Not Required
    NOT_IMPLEMENTED(); //Not Required
}
}
@@ -289,7 +289,7 @@ void ArmToArm64Assembler::prolog()
    *mPC++ = A64_MOVZ_X(mZeroReg,0,0);
    *mPC++ = A64_MOVZ_X(mZeroReg,0,0);
}
}


void ArmToArm64Assembler::epilog(uint32_t touched)
void ArmToArm64Assembler::epilog(uint32_t /*touched*/)
{
{
    // write epilog code
    // write epilog code
    static const int XLR = 30;
    static const int XLR = 30;
@@ -530,23 +530,23 @@ void ArmToArm64Assembler::MUL(int cc, int s, int Rd, int Rm, int Rs)
    if(s  != 0) { NOT_IMPLEMENTED(); return;} //Not required
    if(s  != 0) { NOT_IMPLEMENTED(); return;} //Not required
    *mPC++ = A64_MADD_W(Rd, Rm, Rs, mZeroReg);
    *mPC++ = A64_MADD_W(Rd, Rm, Rs, mZeroReg);
}
}
void ArmToArm64Assembler::UMULL(int cc, int s,
void ArmToArm64Assembler::UMULL(int /*cc*/, int /*s*/,
        int RdLo, int RdHi, int Rm, int Rs)
        int /*RdLo*/, int /*RdHi*/, int /*Rm*/, int /*Rs*/)
{
{
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
}
}
void ArmToArm64Assembler::UMUAL(int cc, int s,
void ArmToArm64Assembler::UMUAL(int /*cc*/, int /*s*/,
        int RdLo, int RdHi, int Rm, int Rs)
        int /*RdLo*/, int /*RdHi*/, int /*Rm*/, int /*Rs*/)
{
{
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
}
}
void ArmToArm64Assembler::SMULL(int cc, int s,
void ArmToArm64Assembler::SMULL(int /*cc*/, int /*s*/,
        int RdLo, int RdHi, int Rm, int Rs)
        int /*RdLo*/, int /*RdHi*/, int /*Rm*/, int /*Rs*/)
{
{
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
}
}
void ArmToArm64Assembler::SMUAL(int cc, int s,
void ArmToArm64Assembler::SMUAL(int /*cc*/, int /*s*/,
        int RdLo, int RdHi, int Rm, int Rs)
        int /*RdLo*/, int /*RdHi*/, int /*Rm*/, int /*Rs*/)
{
{
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
}
}
@@ -554,15 +554,15 @@ void ArmToArm64Assembler::SMUAL(int cc, int s,
// ----------------------------------------------------------------------------
// ----------------------------------------------------------------------------
// branches relative to PC...
// branches relative to PC...
// ----------------------------------------------------------------------------
// ----------------------------------------------------------------------------
void ArmToArm64Assembler::B(int cc, uint32_t* pc){
void ArmToArm64Assembler::B(int /*cc*/, uint32_t* /*pc*/){
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
}
}


void ArmToArm64Assembler::BL(int cc, uint32_t* pc){
void ArmToArm64Assembler::BL(int /*cc*/, uint32_t* /*pc*/){
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
}
}


void ArmToArm64Assembler::BX(int cc, int Rn){
void ArmToArm64Assembler::BX(int /*cc*/, int /*Rn*/){
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
}
}


@@ -661,11 +661,11 @@ void ArmToArm64Assembler::LDRH(int cc, int Rd, int Rn, uint32_t op_type)
{
{
    return dataTransfer(opLDRH, cc, Rd, Rn, op_type);
    return dataTransfer(opLDRH, cc, Rd, Rn, op_type);
}
}
void ArmToArm64Assembler::LDRSB(int cc, int Rd, int Rn, uint32_t offset)
void ArmToArm64Assembler::LDRSB(int /*cc*/, int /*Rd*/, int /*Rn*/, uint32_t /*offset*/)
{
{
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
}
}
void ArmToArm64Assembler::LDRSH(int cc, int Rd, int Rn, uint32_t offset)
void ArmToArm64Assembler::LDRSH(int /*cc*/, int /*Rd*/, int /*Rn*/, uint32_t /*offset*/)
{
{
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
}
}
@@ -723,15 +723,15 @@ void ArmToArm64Assembler::STM(int cc, int dir,
// ----------------------------------------------------------------------------
// ----------------------------------------------------------------------------
// special...
// special...
// ----------------------------------------------------------------------------
// ----------------------------------------------------------------------------
void ArmToArm64Assembler::SWP(int cc, int Rn, int Rd, int Rm)
void ArmToArm64Assembler::SWP(int /*cc*/, int /*Rn*/, int /*Rd*/, int /*Rm*/)
{
{
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
}
}
void ArmToArm64Assembler::SWPB(int cc, int Rn, int Rd, int Rm)
void ArmToArm64Assembler::SWPB(int /*cc*/, int /*Rn*/, int /*Rd*/, int /*Rm*/)
{
{
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
}
}
void ArmToArm64Assembler::SWI(int cc, uint32_t comment)
void ArmToArm64Assembler::SWI(int /*cc*/, uint32_t /*comment*/)
{
{
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
}
}
@@ -739,31 +739,31 @@ void ArmToArm64Assembler::SWI(int cc, uint32_t comment)
// ----------------------------------------------------------------------------
// ----------------------------------------------------------------------------
// DSP instructions...
// DSP instructions...
// ----------------------------------------------------------------------------
// ----------------------------------------------------------------------------
void ArmToArm64Assembler::PLD(int Rn, uint32_t offset) {
void ArmToArm64Assembler::PLD(int /*Rn*/, uint32_t /*offset*/) {
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
}
}


void ArmToArm64Assembler::CLZ(int cc, int Rd, int Rm)
void ArmToArm64Assembler::CLZ(int /*cc*/, int /*Rd*/, int /*Rm*/)
{
{
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
}
}


void ArmToArm64Assembler::QADD(int cc,  int Rd, int Rm, int Rn)
void ArmToArm64Assembler::QADD(int /*cc*/, int /*Rd*/, int /*Rm*/, int /*Rn*/)
{
{
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
}
}


void ArmToArm64Assembler::QDADD(int cc,  int Rd, int Rm, int Rn)
void ArmToArm64Assembler::QDADD(int /*cc*/, int /*Rd*/, int /*Rm*/, int /*Rn*/)
{
{
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
}
}


void ArmToArm64Assembler::QSUB(int cc,  int Rd, int Rm, int Rn)
void ArmToArm64Assembler::QSUB(int /*cc*/, int /*Rd*/, int /*Rm*/, int /*Rn*/)
{
{
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
}
}


void ArmToArm64Assembler::QDSUB(int cc,  int Rd, int Rm, int Rn)
void ArmToArm64Assembler::QDSUB(int /*cc*/, int /*Rd*/, int /*Rm*/, int /*Rn*/)
{
{
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
}
}
@@ -817,15 +817,15 @@ void ArmToArm64Assembler::SMLA(int cc, int xy, int Rd, int Rm, int Rs, int Rn)
    *mPC++ = A64_MADD_W(Rd, mTmpReg1, mTmpReg2, Rn);
    *mPC++ = A64_MADD_W(Rd, mTmpReg1, mTmpReg2, Rn);
}
}


void ArmToArm64Assembler::SMLAL(int cc, int xy,
void ArmToArm64Assembler::SMLAL(int /*cc*/, int /*xy*/,
                int RdHi, int RdLo, int Rs, int Rm)
                int /*RdHi*/, int /*RdLo*/, int /*Rs*/, int /*Rm*/)
{
{
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
    return;
    return;
}
}


void ArmToArm64Assembler::SMLAW(int cc, int y,
void ArmToArm64Assembler::SMLAW(int /*cc*/, int /*y*/,
                int Rd, int Rm, int Rs, int Rn)
                int /*Rd*/, int /*Rm*/, int /*Rs*/, int /*Rn*/)
{
{
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
    return;
    return;
@@ -890,13 +890,13 @@ uint32_t ArmToArm64Assembler::reg_imm(int Rm, int type, uint32_t shift)
    return OPERAND_REG_IMM;
    return OPERAND_REG_IMM;
}
}


uint32_t ArmToArm64Assembler::reg_rrx(int Rm)
uint32_t ArmToArm64Assembler::reg_rrx(int /*Rm*/)
{
{
    NOT_IMPLEMENTED();
    NOT_IMPLEMENTED();
    return OPERAND_UNSUPPORTED;
    return OPERAND_UNSUPPORTED;
}
}


uint32_t ArmToArm64Assembler::reg_reg(int Rm, int type, int Rs)
uint32_t ArmToArm64Assembler::reg_reg(int /*Rm*/, int /*type*/, int /*Rs*/)
{
{
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
    return OPERAND_UNSUPPORTED;
    return OPERAND_UNSUPPORTED;
@@ -937,7 +937,7 @@ uint32_t ArmToArm64Assembler::reg_scale_pre(int Rm, int type,
    }
    }
}
}


uint32_t ArmToArm64Assembler::reg_scale_post(int Rm, int type, uint32_t shift)
uint32_t ArmToArm64Assembler::reg_scale_post(int /*Rm*/, int /*type*/, uint32_t /*shift*/)
{
{
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
    return OPERAND_UNSUPPORTED;
    return OPERAND_UNSUPPORTED;
@@ -975,7 +975,7 @@ uint32_t ArmToArm64Assembler::reg_pre(int Rm, int W)
    }
    }
}
}


uint32_t ArmToArm64Assembler::reg_post(int Rm)
uint32_t ArmToArm64Assembler::reg_post(int /*Rm*/)
{
{
    NOT_IMPLEMENTED(); //Not required
    NOT_IMPLEMENTED(); //Not required
    return OPERAND_UNSUPPORTED;
    return OPERAND_UNSUPPORTED;
+2 −2
Original line number Original line Diff line number Diff line
@@ -694,7 +694,7 @@ void GGLAssembler::build_coverage_application(component_t& fragment,
// ---------------------------------------------------------------------------
// ---------------------------------------------------------------------------


void GGLAssembler::build_alpha_test(component_t& fragment,
void GGLAssembler::build_alpha_test(component_t& fragment,
                                    const fragment_parts_t& parts)
                                    const fragment_parts_t& /*parts*/)
{
{
    if (mAlphaTest != GGL_ALWAYS) {
    if (mAlphaTest != GGL_ALWAYS) {
        comment("Alpha Test");
        comment("Alpha Test");
@@ -796,7 +796,7 @@ void GGLAssembler::build_iterate_z(const fragment_parts_t& parts)
    }
    }
}
}


void GGLAssembler::build_iterate_f(const fragment_parts_t& parts)
void GGLAssembler::build_iterate_f(const fragment_parts_t& /*parts*/)
{
{
    const needs_t& needs = mBuilderContext.needs;
    const needs_t& needs = mBuilderContext.needs;
    if (GGL_READ_NEEDS(P_FOG, needs.p)) {
    if (GGL_READ_NEEDS(P_FOG, needs.p)) {
+8 −8
Original line number Original line Diff line number Diff line
@@ -694,7 +694,7 @@ void GGLAssembler::build_iterate_texture_coordinates(
}
}


void GGLAssembler::filter8(
void GGLAssembler::filter8(
        const fragment_parts_t& parts,
        const fragment_parts_t& /*parts*/,
        pixel_t& texel, const texture_unit_t& tmu,
        pixel_t& texel, const texture_unit_t& tmu,
        int U, int V, pointer_t& txPtr,
        int U, int V, pointer_t& txPtr,
        int FRAC_BITS)
        int FRAC_BITS)
@@ -761,7 +761,7 @@ void GGLAssembler::filter8(
}
}


void GGLAssembler::filter16(
void GGLAssembler::filter16(
        const fragment_parts_t& parts,
        const fragment_parts_t& /*parts*/,
        pixel_t& texel, const texture_unit_t& tmu,
        pixel_t& texel, const texture_unit_t& tmu,
        int U, int V, pointer_t& txPtr,
        int U, int V, pointer_t& txPtr,
        int FRAC_BITS)
        int FRAC_BITS)
@@ -879,10 +879,10 @@ void GGLAssembler::filter16(
}
}


void GGLAssembler::filter24(
void GGLAssembler::filter24(
        const fragment_parts_t& parts,
        const fragment_parts_t& /*parts*/,
        pixel_t& texel, const texture_unit_t& tmu,
        pixel_t& texel, const texture_unit_t& /*tmu*/,
        int U, int V, pointer_t& txPtr,
        int /*U*/, int /*V*/, pointer_t& txPtr,
        int FRAC_BITS)
        int /*FRAC_BITS*/)
{
{
    // not supported yet (currently disabled)
    // not supported yet (currently disabled)
    load(txPtr, texel, 0);
    load(txPtr, texel, 0);
@@ -989,8 +989,8 @@ void GGLAssembler::filter32(
}
}
#else
#else
void GGLAssembler::filter32(
void GGLAssembler::filter32(
        const fragment_parts_t& parts,
        const fragment_parts_t& /*parts*/,
        pixel_t& texel, const texture_unit_t& tmu,
        pixel_t& texel, const texture_unit_t& /*tmu*/,
        int U, int V, pointer_t& txPtr,
        int U, int V, pointer_t& txPtr,
        int FRAC_BITS)
        int FRAC_BITS)
{
{
+1 −1
Original line number Original line Diff line number Diff line
@@ -26,7 +26,7 @@ namespace android {


// ----------------------------------------------------------------------------
// ----------------------------------------------------------------------------


void ggl_init_picker(context_t* c)
void ggl_init_picker(context_t* /*c*/)
{
{
}
}


Loading