Loading libcutils/Android.mk +0 −3 Original line number Diff line number Diff line Loading @@ -106,9 +106,6 @@ LOCAL_SRC_FILES := $(commonSources) \ trace-dev.c \ uevent.c \ # arch-arm/memset32.S does not compile with Clang. LOCAL_CLANG_ASFLAGS_arm += -no-integrated-as LOCAL_SRC_FILES_arm += arch-arm/memset32.S LOCAL_SRC_FILES_arm64 += arch-arm64/android_memset.S Loading libcutils/arch-arm/memset32.S +11 −9 Original line number Diff line number Diff line Loading @@ -18,6 +18,8 @@ * */ .syntax unified .text .align Loading Loading @@ -45,7 +47,7 @@ android_memset16: /* align to 32 bits */ tst r0, #2 strneh r1, [r0], #2 strhne r1, [r0], #2 subne r2, r2, #2 .fnend Loading @@ -68,27 +70,27 @@ android_memset32: /* conditionally writes 0 to 7 words (length in r3) */ movs r3, r3, lsl #28 stmcsia r0!, {r1, lr} stmcsia r0!, {r1, lr} stmmiia r0!, {r1, lr} stmiacs r0!, {r1, lr} stmiacs r0!, {r1, lr} stmiami r0!, {r1, lr} movs r3, r3, lsl #2 strcs r1, [r0], #4 .Laligned32: mov r3, r1 1: subs r2, r2, #32 stmhsia r0!, {r1,r3,r12,lr} stmhsia r0!, {r1,r3,r12,lr} stmiahs r0!, {r1,r3,r12,lr} stmiahs r0!, {r1,r3,r12,lr} bhs 1b add r2, r2, #32 /* conditionally stores 0 to 30 bytes */ movs r2, r2, lsl #28 stmcsia r0!, {r1,r3,r12,lr} stmmiia r0!, {r1,lr} stmiacs r0!, {r1,r3,r12,lr} stmiami r0!, {r1,lr} movs r2, r2, lsl #2 strcs r1, [r0], #4 strmih lr, [r0], #2 strhmi lr, [r0], #2 ldr lr, [sp], #4 .cfi_def_cfa_offset 0 Loading Loading
libcutils/Android.mk +0 −3 Original line number Diff line number Diff line Loading @@ -106,9 +106,6 @@ LOCAL_SRC_FILES := $(commonSources) \ trace-dev.c \ uevent.c \ # arch-arm/memset32.S does not compile with Clang. LOCAL_CLANG_ASFLAGS_arm += -no-integrated-as LOCAL_SRC_FILES_arm += arch-arm/memset32.S LOCAL_SRC_FILES_arm64 += arch-arm64/android_memset.S Loading
libcutils/arch-arm/memset32.S +11 −9 Original line number Diff line number Diff line Loading @@ -18,6 +18,8 @@ * */ .syntax unified .text .align Loading Loading @@ -45,7 +47,7 @@ android_memset16: /* align to 32 bits */ tst r0, #2 strneh r1, [r0], #2 strhne r1, [r0], #2 subne r2, r2, #2 .fnend Loading @@ -68,27 +70,27 @@ android_memset32: /* conditionally writes 0 to 7 words (length in r3) */ movs r3, r3, lsl #28 stmcsia r0!, {r1, lr} stmcsia r0!, {r1, lr} stmmiia r0!, {r1, lr} stmiacs r0!, {r1, lr} stmiacs r0!, {r1, lr} stmiami r0!, {r1, lr} movs r3, r3, lsl #2 strcs r1, [r0], #4 .Laligned32: mov r3, r1 1: subs r2, r2, #32 stmhsia r0!, {r1,r3,r12,lr} stmhsia r0!, {r1,r3,r12,lr} stmiahs r0!, {r1,r3,r12,lr} stmiahs r0!, {r1,r3,r12,lr} bhs 1b add r2, r2, #32 /* conditionally stores 0 to 30 bytes */ movs r2, r2, lsl #28 stmcsia r0!, {r1,r3,r12,lr} stmmiia r0!, {r1,lr} stmiacs r0!, {r1,r3,r12,lr} stmiami r0!, {r1,lr} movs r2, r2, lsl #2 strcs r1, [r0], #4 strmih lr, [r0], #2 strhmi lr, [r0], #2 ldr lr, [sp], #4 .cfi_def_cfa_offset 0 Loading