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Commit b13a10bb authored by Xia Lifang's avatar Xia Lifang Committed by Elliott Hughes
Browse files

Add riscv64 support for debuggerd/crasher 



Signed-off-by: default avatarXia Lifang <lifang_xia@linux.alibaba.com>
Signed-off-by: default avatarMao Han <han_mao@linux.alibaba.com>
Change-Id: I521c6da61cf2f6f67a73febf368068c430d94cdb
parent ef8ea8f9

debuggerd/crasher/Android.bp

+3 −0
Original line number Diff line number Diff line
@@ -27,6 +27,9 @@ cc_defaults { 
        arm64: {

            srcs: ["arm64/crashglue.S"],

        },

        riscv64: {

            srcs: ["riscv64/crashglue.S"],

        },

        x86: {

            srcs: ["x86/crashglue.S"],

        },

debuggerd/crasher/crasher.cpp

+2 −0
Original line number Diff line number Diff line
@@ -303,6 +303,8 @@ noinline int do_action(const char* arg) { 
      __asm__ volatile(".word 0xe7f0def0\n");

#elif defined(__i386__) || defined(__x86_64__)

      __asm__ volatile("ud2\n");

#elif defined(__riscv)

      __asm__ volatile("unimp\n");

#else

#error

#endif

debuggerd/crasher/riscv64/crashglue.S

0 → 100644
+45 −0
Original line number Diff line number Diff line 


	.globl crash1

	.globl crashnostack



crash1:

	li	x0,0xdead0000+0

	li	x1,0xdead0000+1

	li	x2,0xdead0000+2

	li	x3,0xdead0000+3

	li	x4,0xdead0000+4

	li	x5,0xdead0000+5

	li	x6,0xdead0000+6

	li	x7,0xdead0000+7

	li	x8,0xdead0000+8

	li	x9,0xdead0000+9

	li	x10,0xdead0000+10

	li	x11,0xdead0000+11

	li	x12,0xdead0000+12

	li	x13,0xdead0000+13

	li	x14,0xdead0000+14

	li	x15,0xdead0000+15

	li	x16,0xdead0000+16

	li	x17,0xdead0000+17

	li	x18,0xdead0000+18

	li	x19,0xdead0000+19

	li	x20,0xdead0000+20

	li	x21,0xdead0000+21

	li	x22,0xdead0000+22

	li	x23,0xdead0000+23

	li	x24,0xdead0000+24

	li	x25,0xdead0000+25

	li	x26,0xdead0000+26

	li	x27,0xdead0000+27

	li	x28,0xdead0000+28

	# don't trash the stack otherwise the signal handler won't run

	#li	$29,0xdead0000+29

	li	x30,0xdead0000+30

	li	x31,0xdead0000+31



	j .





crashnostack:

	li	sp, 0

	j .