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Commit 32ea4a89 authored by Colin Cross's avatar Colin Cross
Browse files

pixelflinger: use __builtin___clear_cache instead of cacheflush

cacheflush doesn't exist on LP64 any more, and gcc's
__builtin___clear_cache is better in every way.  Use it instead.

Change-Id: Ibbf6facbdefc15b6dda51d014e1c44fb7aa2b17d
parent 85516e9d
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+1 −5
Original line number Original line Diff line number Diff line
@@ -201,13 +201,9 @@ int CodeCache::cache( const AssemblyKeyBase& keyBase,
        mCacheInUse += assemblySize;
        mCacheInUse += assemblySize;
        mWhen++;
        mWhen++;
        // synchronize caches...
        // synchronize caches...
#if defined(__arm__) || defined(__mips__) || defined(__aarch64__)
        const long base = long(assembly->base());
        const long base = long(assembly->base());
        const long curr = base + long(assembly->size());
        const long curr = base + long(assembly->size());
        err = cacheflush(base, curr, 0);
        __builtin___clear_cache((void*)base, (void*)curr);
        ALOGE_IF(err, "cacheflush error %s\n",
                 strerror(errno));
#endif
    }
    }


    pthread_mutex_unlock(&mLock);
    pthread_mutex_unlock(&mLock);
+2 −2
Original line number Original line Diff line number Diff line
@@ -405,11 +405,11 @@ dataTransferTest_t dataTransferTests [] =
};
};




int flushcache()
void flushcache()
{
{
    const long base = long(instrMem);
    const long base = long(instrMem);
    const long curr = base + long(instrMemSize);
    const long curr = base + long(instrMemSize);
    return cacheflush(base, curr, 0);
    __builtin___clear_cache((void*)base, (void*)curr);
}
}
void dataOpTest(dataOpTest_t test, ARMAssemblerInterface *a64asm, uint32_t Rd = 0,
void dataOpTest(dataOpTest_t test, ARMAssemblerInterface *a64asm, uint32_t Rd = 0,
                uint32_t Rn = 1, uint32_t Rm = 2, uint32_t Rs = 3)
                uint32_t Rn = 1, uint32_t Rm = 2, uint32_t Rs = 3)