Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 6361b35d authored by Hansong Zhang's avatar Hansong Zhang Committed by Automerger Merge Worker
Browse files

We always send default flush timeout am: f10f3694

Original change: https://android-review.googlesource.com/c/platform/system/bt/+/1437935

Change-Id: I66644495f589ca8a4a6a9db849018ce21b58102f
parents cb35058c f10f3694
Loading
Loading
Loading
Loading
+0 −8
Original line number Diff line number Diff line
@@ -1039,10 +1039,6 @@
#define HID_DEV_MTU_SIZE 512
#endif

#ifndef HID_DEV_FLUSH_TO
#define HID_DEV_FLUSH_TO 0xffff
#endif

/*************************************************************************
 * Definitions for Both HID-Host & Device
*/
@@ -1073,10 +1069,6 @@
#define HID_HOST_MTU 640
#endif

#ifndef HID_HOST_FLUSH_TO
#define HID_HOST_FLUSH_TO 0xffff
#endif

#ifndef HID_HOST_MAX_CONN_RETRY
#define HID_HOST_MAX_CONN_RETRY 1
#endif
+0 −8
Original line number Diff line number Diff line
@@ -98,8 +98,6 @@ static void avdt_sec_check_complete_term(const RawAddress* bd_addr,
    memset(&cfg, 0, sizeof(tL2CAP_CFG_INFO));
    cfg.mtu_present = true;
    cfg.mtu = kSignalMtu;
    cfg.flush_to_present = true;
    cfg.flush_to = L2CAP_DEFAULT_FLUSH_TO;
    L2CA_ConfigReq(p_tbl->lcid, &cfg);
  } else {
    L2CA_ConnectRsp(*bd_addr, p_tbl->id, p_tbl->lcid, L2CAP_CONN_SECURITY_BLOCK,
@@ -139,8 +137,6 @@ static void avdt_sec_check_complete_orig(const RawAddress* bd_addr,
    memset(&cfg, 0, sizeof(tL2CAP_CFG_INFO));
    cfg.mtu_present = true;
    cfg.mtu = kSignalMtu;
    cfg.flush_to_present = true;
    cfg.flush_to = L2CAP_DEFAULT_FLUSH_TO;
    L2CA_ConfigReq(p_tbl->lcid, &cfg);
  } else {
    avdt_l2c_disconnect(p_tbl->lcid);
@@ -247,8 +243,6 @@ void avdt_l2c_connect_ind_cback(const RawAddress& bd_addr, uint16_t lcid,
    memset(&cfg, 0, sizeof(tL2CAP_CFG_INFO));
    cfg.mtu_present = true;
    cfg.mtu = p_tbl->my_mtu;
    cfg.flush_to_present = true;
    cfg.flush_to = L2CAP_DEFAULT_FLUSH_TO;
    L2CA_ConfigReq(lcid, &cfg);
  }
}
@@ -285,8 +279,6 @@ void avdt_l2c_connect_cfm_cback(uint16_t lcid, uint16_t result) {
          memset(&cfg, 0, sizeof(tL2CAP_CFG_INFO));
          cfg.mtu_present = true;
          cfg.mtu = p_tbl->my_mtu;
          cfg.flush_to_present = true;
          cfg.flush_to = L2CAP_DEFAULT_FLUSH_TO;
          L2CA_ConfigReq(lcid, &cfg);
        } else {
          p_ccb = avdt_ccb_by_idx(p_tbl->ccb_idx);
+0 −2
Original line number Diff line number Diff line
@@ -98,8 +98,6 @@
#define BNEP_IFLOW_LATENCY 0
#define BNEP_IFLOW_DELAY_VARIATION 0

#define BNEP_FLUSH_TO 0xFFFF

#define BNEP_MAX_RETRANSMITS 3

/* Define the BNEP Connection Control Block
+0 −2
Original line number Diff line number Diff line
@@ -81,8 +81,6 @@ tBNEP_RESULT bnep_register_with_l2cap(void) {

  bnep_cb.l2cap_my_cfg.mtu_present = true;
  bnep_cb.l2cap_my_cfg.mtu = BNEP_MTU_SIZE;
  bnep_cb.l2cap_my_cfg.flush_to_present = true;
  bnep_cb.l2cap_my_cfg.flush_to = BNEP_FLUSH_TO;

  bnep_cb.reg_info.pL2CA_ConnectInd_Cb = bnep_connect_ind;
  bnep_cb.reg_info.pL2CA_ConnectCfm_Cb = bnep_connect_cfm;
+0 −5
Original line number Diff line number Diff line
@@ -737,14 +737,9 @@ tHID_STATUS hidd_conn_reg(void) {

  hd_cb.l2cap_cfg.mtu_present = TRUE;
  hd_cb.l2cap_cfg.mtu = HID_DEV_MTU_SIZE;
  hd_cb.l2cap_cfg.flush_to_present = TRUE;
  hd_cb.l2cap_cfg.flush_to = HID_DEV_FLUSH_TO;

  memset(&hd_cb.l2cap_intr_cfg, 0, sizeof(tL2CAP_CFG_INFO));
  hd_cb.l2cap_intr_cfg.mtu_present = TRUE;
  hd_cb.l2cap_intr_cfg.mtu = HID_DEV_MTU_SIZE;
  hd_cb.l2cap_intr_cfg.flush_to_present = TRUE;
  hd_cb.l2cap_intr_cfg.flush_to = HID_DEV_FLUSH_TO;

  if (!L2CA_Register2(HID_PSM_CONTROL, dev_reg_info, false /* enable_snoop */,
                      nullptr, hd_cb.l2cap_cfg.mtu,
Loading