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Commit ac0fa2df authored by Vignesh Kulothungan's avatar Vignesh Kulothungan
Browse files

configs: lahaina: update dmic channel order 

Update the channel order of speaker dualmic endfire
and broadside usecases. Channel order is controlled
from sound wire slave offset configuration to handle
bandwidth and mic placement.

Change-Id: I9f1797fc83f2ce297e88b745bf25039f5d78240c
parent bbc535ae

configs/lahaina/mixer_paths.xml

+4 −4
Original line number Diff line number Diff line
@@ -2959,10 +2959,10 @@ 
        <ctl name="TX_CDC_DMA_TX_3 Channels" value="Two" />

        <ctl name="TX_AIF1_CAP Mixer DEC1" value="1" />

        <ctl name="TX DEC1 MUX" value="SWR_MIC" />

        <ctl name="TX SMIC MUX1" value="SWR_MIC3" />

        <ctl name="TX SMIC MUX1" value="SWR_MIC0" />

        <ctl name="TX_AIF1_CAP Mixer DEC2" value="1" />

        <ctl name="TX DEC2 MUX" value="SWR_MIC" />

        <ctl name="TX SMIC MUX2" value="SWR_MIC0" />

        <ctl name="TX SMIC MUX2" value="SWR_MIC3" />

        <ctl name="SWR_MIC0 HIFI PortMap" value="SWRM_TX1_CH1" />

        <ctl name="SWR_MIC3 HIFI PortMap" value="SWRM_TX1_CH4" />

        <ctl name="SWR_MIC3 SWR_DMIC_MIXER Switch" value="1" />
@@ -3038,10 +3038,10 @@ 
        <ctl name="TX_CDC_DMA_TX_3 Channels" value="Two" />

        <ctl name="TX_AIF1_CAP Mixer DEC1" value="1" />

        <ctl name="TX DEC1 MUX" value="SWR_MIC" />

        <ctl name="TX SMIC MUX1" value="SWR_MIC3" />

        <ctl name="TX SMIC MUX1" value="SWR_MIC0" />

        <ctl name="TX_AIF1_CAP Mixer DEC2" value="1" />

        <ctl name="TX DEC2 MUX" value="SWR_MIC" />

        <ctl name="TX SMIC MUX2" value="SWR_MIC0" />

        <ctl name="TX SMIC MUX2" value="SWR_MIC3" />

        <ctl name="SWR_MIC0 HIFI PortMap" value="SWRM_TX1_CH1" />

        <ctl name="SWR_MIC3 HIFI PortMap" value="SWRM_TX1_CH4" />

        <ctl name="SWR_MIC3 SWR_DMIC_MIXER Switch" value="1" />