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Commit deba796f authored by Shai Barack's avatar Shai Barack
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Enable `is_always_lock_free` assertion on RISC-V with Zacas.

The `__riscv_zacas` extension provides the necessary atomic operations for `CacheEntry` to be lock-free, so the assertion is no longer relaxed on RISC-V platforms that support it.

Flag: android.os.parcel_string_cache_enabled
Bug: 442920832

Change-Id: Id8cfd8dbc9dd764878e9140ff3b3b361a4b68be4
parent 8d900756
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+3 −3
Original line number Diff line number Diff line
@@ -100,9 +100,9 @@ private:

    // On most target architectures, CacheEntry can be stored in a lock-free atomic. We use the
    // assertion below to ensure that the struct remains this way.
    // Supported RISC-V ISAs (RVA32 and RISC-V64) don't offer atomics that are wide enough. The code
    // won't be as efficient, but will still be correct, so we relax the assertion for RISC-V.
#if !defined(__riscv)
    // On RISC-V without the Zacas extension, the atomic operations are not wide enough, but the
    // code is otherwise correct, so relax the assertion.
#if !(defined(__riscv) && !defined(__riscv_zacas))
    static_assert(std::atomic<CacheEntry>::is_always_lock_free);
#endif