New clock sync control loop.
Change clock sync control to velicity form PI loop. Tuned for office LAN and WiFi conditions, will probably perform better in clean environments. Improve packet filtering to prevent clock sync on bad rtt. Changed diag interface to take rtt times, P, I, D are no longer supported. Change-Id: Iad2b26eb44cd222ec5f219b49669e2d6baec9d1c
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