Loading cc/sabi.go +7 −2 Original line number Diff line number Diff line Loading @@ -74,8 +74,13 @@ func (sabimod *sabi) flags(ctx ModuleContext, flags Flags) Flags { // RSClang does not support recent mcpu option likes exynos-m2. // So we need overriding mcpu option when we want to use it. if ctx.Arch().CpuVariant == "exynos-m2" { flags.ToolingCFlags = append(flags.ToolingCFlags, "-mcpu=cortex-a53") mappedArch := map[string]string{ "exynos-m2": "cortex-a53", "cortex-a55": "cortex-a53", "cortex-a75": "cortex-a57", } if arch, ok := mappedArch[ctx.Arch().CpuVariant]; ok { flags.ToolingCFlags = append(flags.ToolingCFlags, "-mcpu="+arch) } return flags Loading Loading
cc/sabi.go +7 −2 Original line number Diff line number Diff line Loading @@ -74,8 +74,13 @@ func (sabimod *sabi) flags(ctx ModuleContext, flags Flags) Flags { // RSClang does not support recent mcpu option likes exynos-m2. // So we need overriding mcpu option when we want to use it. if ctx.Arch().CpuVariant == "exynos-m2" { flags.ToolingCFlags = append(flags.ToolingCFlags, "-mcpu=cortex-a53") mappedArch := map[string]string{ "exynos-m2": "cortex-a53", "cortex-a55": "cortex-a53", "cortex-a75": "cortex-a57", } if arch, ok := mappedArch[ctx.Arch().CpuVariant]; ok { flags.ToolingCFlags = append(flags.ToolingCFlags, "-mcpu="+arch) } return flags Loading