Loading cc/config/global.go +0 −5 Original line number Diff line number Diff line Loading @@ -174,9 +174,6 @@ var ( "-Werror=format-security", "-nostdlibinc", // Enable MLGO for register allocation. "-mllvm -regalloc-enable-advisor=release", // Emit additional debug info for AutoFDO "-fdebug-info-for-profiling", } Loading Loading @@ -205,8 +202,6 @@ var ( "-Wl,--exclude-libs,libgcc_stripped.a", "-Wl,--exclude-libs,libunwind_llvm.a", "-Wl,--exclude-libs,libunwind.a", // Enable MLGO for register allocation. "-Wl,-mllvm,-regalloc-enable-advisor=release", } deviceGlobalLldflags = append(append(deviceGlobalLdflags, commonGlobalLldflags...), Loading cc/lto.go +9 −4 Original line number Diff line number Diff line Loading @@ -147,11 +147,16 @@ func (lto *lto) flags(ctx BaseModuleContext, flags Flags) Flags { } } // For ML training // Register allocation MLGO flags for ARM64. if ctx.Arch().ArchType == android.Arm64 { ltoCFlags = append(ltoCFlags, "-mllvm -regalloc-enable-advisor=release") ltoLdFlags = append(ltoLdFlags, "-Wl,-mllvm,-regalloc-enable-advisor=release") // Flags for training MLGO model. if ctx.Config().IsEnvTrue("THINLTO_EMIT_INDEXES_AND_IMPORTS") { ltoLdFlags = append(ltoLdFlags, "-Wl,--save-temps=import") ltoLdFlags = append(ltoLdFlags, "-Wl,--thinlto-emit-index-files") } } flags.Local.CFlags = append(flags.Local.CFlags, ltoCFlags...) flags.Local.AsFlags = append(flags.Local.AsFlags, ltoCFlags...) Loading Loading
cc/config/global.go +0 −5 Original line number Diff line number Diff line Loading @@ -174,9 +174,6 @@ var ( "-Werror=format-security", "-nostdlibinc", // Enable MLGO for register allocation. "-mllvm -regalloc-enable-advisor=release", // Emit additional debug info for AutoFDO "-fdebug-info-for-profiling", } Loading Loading @@ -205,8 +202,6 @@ var ( "-Wl,--exclude-libs,libgcc_stripped.a", "-Wl,--exclude-libs,libunwind_llvm.a", "-Wl,--exclude-libs,libunwind.a", // Enable MLGO for register allocation. "-Wl,-mllvm,-regalloc-enable-advisor=release", } deviceGlobalLldflags = append(append(deviceGlobalLdflags, commonGlobalLldflags...), Loading
cc/lto.go +9 −4 Original line number Diff line number Diff line Loading @@ -147,11 +147,16 @@ func (lto *lto) flags(ctx BaseModuleContext, flags Flags) Flags { } } // For ML training // Register allocation MLGO flags for ARM64. if ctx.Arch().ArchType == android.Arm64 { ltoCFlags = append(ltoCFlags, "-mllvm -regalloc-enable-advisor=release") ltoLdFlags = append(ltoLdFlags, "-Wl,-mllvm,-regalloc-enable-advisor=release") // Flags for training MLGO model. if ctx.Config().IsEnvTrue("THINLTO_EMIT_INDEXES_AND_IMPORTS") { ltoLdFlags = append(ltoLdFlags, "-Wl,--save-temps=import") ltoLdFlags = append(ltoLdFlags, "-Wl,--thinlto-emit-index-files") } } flags.Local.CFlags = append(flags.Local.CFlags, ltoCFlags...) flags.Local.AsFlags = append(flags.Local.AsFlags, ltoCFlags...) Loading