Loading core/combo/arch/arm/armv7-a-neon.mk +15 −3 Original line number Diff line number Diff line Loading @@ -6,6 +6,8 @@ ARCH_ARM_HAVE_VFP := true ARCH_ARM_HAVE_VFP_D32 := true ARCH_ARM_HAVE_NEON := true local_arch_has_lpae := false ifneq (,$(filter cortex-a15 krait denver,$(TARGET_$(combo_2nd_arch_prefix)CPU_VARIANT))) # TODO: krait is not a cortex-a15, we set the variant to cortex-a15 so that # hardware divide operations are generated. This should be removed and a Loading @@ -13,9 +15,7 @@ ifneq (,$(filter cortex-a15 krait denver,$(TARGET_$(combo_2nd_arch_prefix)CPU_VA # core/clang/arm.mk. arch_variant_cflags := -mcpu=cortex-a15 # Fake an ARM compiler flag as these processors support LPAE which GCC/clang # don't advertise. arch_variant_cflags += -D__ARM_FEATURE_LPAE=1 local_arch_has_lpae := true arch_variant_ldflags := \ -Wl,--no-fix-cortex-a8 else Loading @@ -26,6 +26,8 @@ ifeq ($(strip $(TARGET_$(combo_2nd_arch_prefix)CPU_VARIANT)),cortex-a8) else ifneq (,$(filter cortex-a7 cortex-a53 cortex-a53.a57,$(TARGET_$(combo_2nd_arch_prefix)CPU_VARIANT))) arch_variant_cflags := -mcpu=cortex-a7 local_arch_has_lpae := true arch_variant_ldflags := \ -Wl,--no-fix-cortex-a8 else Loading @@ -37,6 +39,16 @@ endif endif endif ifeq (true,$(local_arch_has_lpae)) # Fake an ARM compiler flag as these processors support LPAE which GCC/clang # don't advertise. # TODO This is a hack and we need to add it for each processor that supports LPAE until some # better solution comes around. See Bug 27340895 arch_variant_cflags += -D__ARM_FEATURE_LPAE=1 endif local_arch_has_lpae := arch_variant_cflags += \ -mfloat-abi=softfp \ -mfpu=neon Loading
core/combo/arch/arm/armv7-a-neon.mk +15 −3 Original line number Diff line number Diff line Loading @@ -6,6 +6,8 @@ ARCH_ARM_HAVE_VFP := true ARCH_ARM_HAVE_VFP_D32 := true ARCH_ARM_HAVE_NEON := true local_arch_has_lpae := false ifneq (,$(filter cortex-a15 krait denver,$(TARGET_$(combo_2nd_arch_prefix)CPU_VARIANT))) # TODO: krait is not a cortex-a15, we set the variant to cortex-a15 so that # hardware divide operations are generated. This should be removed and a Loading @@ -13,9 +15,7 @@ ifneq (,$(filter cortex-a15 krait denver,$(TARGET_$(combo_2nd_arch_prefix)CPU_VA # core/clang/arm.mk. arch_variant_cflags := -mcpu=cortex-a15 # Fake an ARM compiler flag as these processors support LPAE which GCC/clang # don't advertise. arch_variant_cflags += -D__ARM_FEATURE_LPAE=1 local_arch_has_lpae := true arch_variant_ldflags := \ -Wl,--no-fix-cortex-a8 else Loading @@ -26,6 +26,8 @@ ifeq ($(strip $(TARGET_$(combo_2nd_arch_prefix)CPU_VARIANT)),cortex-a8) else ifneq (,$(filter cortex-a7 cortex-a53 cortex-a53.a57,$(TARGET_$(combo_2nd_arch_prefix)CPU_VARIANT))) arch_variant_cflags := -mcpu=cortex-a7 local_arch_has_lpae := true arch_variant_ldflags := \ -Wl,--no-fix-cortex-a8 else Loading @@ -37,6 +39,16 @@ endif endif endif ifeq (true,$(local_arch_has_lpae)) # Fake an ARM compiler flag as these processors support LPAE which GCC/clang # don't advertise. # TODO This is a hack and we need to add it for each processor that supports LPAE until some # better solution comes around. See Bug 27340895 arch_variant_cflags += -D__ARM_FEATURE_LPAE=1 endif local_arch_has_lpae := arch_variant_cflags += \ -mfloat-abi=softfp \ -mfpu=neon