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Commit ab3a5f49 authored Apr 29, 2015 by Chris Dearman

Configure synci generation explicitly

The default for synci generation is compiler version dependent

Change-Id: I3f94cabd98c45aaa4e5149e8bb050dc47efa61ca

parent 0a3b080a

core/clang/mips.mk

+1 −0

Original line number	Diff line number	Diff line
		@@ -12,6 +12,7 @@ CLANG_CONFIG_mips_UNKNOWN_CFLAGS := \
		-frerun-cse-after-loop \
		-frename-registers \
		-msynci \
		-mno-synci \
		-mno-fused-madd

		# We don't have any mips flags to substitute yet.

core/clang/mips64.mk

+1 −0

Original line number	Diff line number	Diff line
		@@ -12,6 +12,7 @@ CLANG_CONFIG_mips64_UNKNOWN_CFLAGS := \
		-frerun-cse-after-loop \
		-frename-registers \
		-msynci \
		-mno-synci \
		-mno-fused-madd

		# We don't have any mips64 flags to substitute yet.

core/combo/arch/mips/mips32-fp.mk

+1 −0

Original line number	Diff line number	Diff line
		@@ -7,6 +7,7 @@ arch_variant_cflags := \
		-mips32 \
		-mfp32 \
		-modd-spreg \
		-mno-synci

		arch_variant_ldflags := \
		-Wl,-melf32ltsmip

core/combo/arch/mips/mips32r2-fp-xburst.mk

+2 −1

Original line number	Diff line number	Diff line
		@@ -9,7 +9,8 @@ arch_variant_cflags := \
		-mfp32 \
		-modd-spreg \
		-mno-fused-madd \
		-Wa,-mmxu
		-Wa,-mmxu \
		-mno-synci

		arch_variant_ldflags := \
		-Wl,-melf32ltsmip