Loading arch/arm/kernel/topology.c +19 −42 Original line number Diff line number Diff line Loading @@ -81,12 +81,8 @@ struct cpu_efficiency table_efficiency[] = { {NULL, }, }; struct cpu_capacity { unsigned long hwid; unsigned long capacity; }; struct cpu_capacity *cpu_capacity; unsigned long *__cpu_capacity; #define cpu_capacity(cpu) __cpu_capacity[cpu] unsigned long middle_capacity = 1; Loading @@ -107,15 +103,19 @@ static void __init parse_dt_topology(void) unsigned long capacity = 0; int alloc_size, cpu = 0; alloc_size = nr_cpu_ids * sizeof(struct cpu_capacity); cpu_capacity = kzalloc(alloc_size, GFP_NOWAIT); alloc_size = nr_cpu_ids * sizeof(*__cpu_capacity); __cpu_capacity = kzalloc(alloc_size, GFP_NOWAIT); while ((cn = of_find_node_by_type(cn, "cpu"))) { const u32 *rate, *reg; for_each_possible_cpu(cpu) { const u32 *rate; int len; if (cpu >= num_possible_cpus()) break; /* too early to use cpu->of_node */ cn = of_get_cpu_node(cpu, NULL); if (!cn) { pr_err("missing device node for CPU %d\n", cpu); continue; } for (cpu_eff = table_efficiency; cpu_eff->compatible; cpu_eff++) if (of_device_is_compatible(cn, cpu_eff->compatible)) Loading @@ -133,12 +133,6 @@ static void __init parse_dt_topology(void) continue; } reg = of_get_property(cn, "reg", &len); if (!reg || len != 4) { pr_err("%s missing reg property\n", cn->full_name); continue; } capacity = ((be32_to_cpup(rate)) >> 20) * cpu_eff->efficiency; /* Save min capacity of the system */ Loading @@ -149,13 +143,9 @@ static void __init parse_dt_topology(void) if (capacity > max_capacity) max_capacity = capacity; cpu_capacity[cpu].capacity = capacity; cpu_capacity[cpu++].hwid = be32_to_cpup(reg); cpu_capacity(cpu) = capacity; } if (cpu < num_possible_cpus()) cpu_capacity[cpu].hwid = (unsigned long)(-1); /* If min and max capacities are equals, we bypass the update of the * cpu_scale because all CPUs have the same capacity. Otherwise, we * compute a middle_capacity factor that will ensure that the capacity Loading @@ -163,9 +153,7 @@ static void __init parse_dt_topology(void) * SCHED_POWER_SCALE, which is the default value, but with the * constraint explained near table_efficiency[]. */ if (min_capacity == max_capacity) cpu_capacity[0].hwid = (unsigned long)(-1); else if (4*max_capacity < (3*(max_capacity + min_capacity))) if (4*max_capacity < (3*(max_capacity + min_capacity))) middle_capacity = (min_capacity + max_capacity) >> (SCHED_POWER_SHIFT+1); else Loading @@ -179,23 +167,12 @@ static void __init parse_dt_topology(void) * boot. The update of all CPUs is in O(n^2) for heteregeneous system but the * function returns directly for SMP system. */ void update_cpu_power(unsigned int cpu, unsigned long hwid) void update_cpu_power(unsigned int cpu) { unsigned int idx = 0; /* look for the cpu's hwid in the cpu capacity table */ for (idx = 0; idx < num_possible_cpus(); idx++) { if (cpu_capacity[idx].hwid == hwid) break; if (cpu_capacity[idx].hwid == -1) return; } if (idx == num_possible_cpus()) if (!cpu_capacity(cpu)) return; set_power_scale(cpu, cpu_capacity[idx].capacity / middle_capacity); set_power_scale(cpu, cpu_capacity(cpu) / middle_capacity); printk(KERN_INFO "CPU%u: update cpu_power %lu\n", cpu, arch_scale_freq_power(NULL, cpu)); Loading @@ -203,7 +180,7 @@ void update_cpu_power(unsigned int cpu, unsigned long hwid) #else static inline void parse_dt_topology(void) {} static inline void update_cpu_power(unsigned int cpuid, unsigned int mpidr) {} static inline void update_cpu_power(unsigned int cpuid) {} #endif /* Loading Loading @@ -290,7 +267,7 @@ void store_cpu_topology(unsigned int cpuid) update_siblings_masks(cpuid); update_cpu_power(cpuid, mpidr & MPIDR_HWID_BITMASK); update_cpu_power(cpuid); printk(KERN_INFO "CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n", cpuid, cpu_topology[cpuid].thread_id, Loading Loading
arch/arm/kernel/topology.c +19 −42 Original line number Diff line number Diff line Loading @@ -81,12 +81,8 @@ struct cpu_efficiency table_efficiency[] = { {NULL, }, }; struct cpu_capacity { unsigned long hwid; unsigned long capacity; }; struct cpu_capacity *cpu_capacity; unsigned long *__cpu_capacity; #define cpu_capacity(cpu) __cpu_capacity[cpu] unsigned long middle_capacity = 1; Loading @@ -107,15 +103,19 @@ static void __init parse_dt_topology(void) unsigned long capacity = 0; int alloc_size, cpu = 0; alloc_size = nr_cpu_ids * sizeof(struct cpu_capacity); cpu_capacity = kzalloc(alloc_size, GFP_NOWAIT); alloc_size = nr_cpu_ids * sizeof(*__cpu_capacity); __cpu_capacity = kzalloc(alloc_size, GFP_NOWAIT); while ((cn = of_find_node_by_type(cn, "cpu"))) { const u32 *rate, *reg; for_each_possible_cpu(cpu) { const u32 *rate; int len; if (cpu >= num_possible_cpus()) break; /* too early to use cpu->of_node */ cn = of_get_cpu_node(cpu, NULL); if (!cn) { pr_err("missing device node for CPU %d\n", cpu); continue; } for (cpu_eff = table_efficiency; cpu_eff->compatible; cpu_eff++) if (of_device_is_compatible(cn, cpu_eff->compatible)) Loading @@ -133,12 +133,6 @@ static void __init parse_dt_topology(void) continue; } reg = of_get_property(cn, "reg", &len); if (!reg || len != 4) { pr_err("%s missing reg property\n", cn->full_name); continue; } capacity = ((be32_to_cpup(rate)) >> 20) * cpu_eff->efficiency; /* Save min capacity of the system */ Loading @@ -149,13 +143,9 @@ static void __init parse_dt_topology(void) if (capacity > max_capacity) max_capacity = capacity; cpu_capacity[cpu].capacity = capacity; cpu_capacity[cpu++].hwid = be32_to_cpup(reg); cpu_capacity(cpu) = capacity; } if (cpu < num_possible_cpus()) cpu_capacity[cpu].hwid = (unsigned long)(-1); /* If min and max capacities are equals, we bypass the update of the * cpu_scale because all CPUs have the same capacity. Otherwise, we * compute a middle_capacity factor that will ensure that the capacity Loading @@ -163,9 +153,7 @@ static void __init parse_dt_topology(void) * SCHED_POWER_SCALE, which is the default value, but with the * constraint explained near table_efficiency[]. */ if (min_capacity == max_capacity) cpu_capacity[0].hwid = (unsigned long)(-1); else if (4*max_capacity < (3*(max_capacity + min_capacity))) if (4*max_capacity < (3*(max_capacity + min_capacity))) middle_capacity = (min_capacity + max_capacity) >> (SCHED_POWER_SHIFT+1); else Loading @@ -179,23 +167,12 @@ static void __init parse_dt_topology(void) * boot. The update of all CPUs is in O(n^2) for heteregeneous system but the * function returns directly for SMP system. */ void update_cpu_power(unsigned int cpu, unsigned long hwid) void update_cpu_power(unsigned int cpu) { unsigned int idx = 0; /* look for the cpu's hwid in the cpu capacity table */ for (idx = 0; idx < num_possible_cpus(); idx++) { if (cpu_capacity[idx].hwid == hwid) break; if (cpu_capacity[idx].hwid == -1) return; } if (idx == num_possible_cpus()) if (!cpu_capacity(cpu)) return; set_power_scale(cpu, cpu_capacity[idx].capacity / middle_capacity); set_power_scale(cpu, cpu_capacity(cpu) / middle_capacity); printk(KERN_INFO "CPU%u: update cpu_power %lu\n", cpu, arch_scale_freq_power(NULL, cpu)); Loading @@ -203,7 +180,7 @@ void update_cpu_power(unsigned int cpu, unsigned long hwid) #else static inline void parse_dt_topology(void) {} static inline void update_cpu_power(unsigned int cpuid, unsigned int mpidr) {} static inline void update_cpu_power(unsigned int cpuid) {} #endif /* Loading Loading @@ -290,7 +267,7 @@ void store_cpu_topology(unsigned int cpuid) update_siblings_masks(cpuid); update_cpu_power(cpuid, mpidr & MPIDR_HWID_BITMASK); update_cpu_power(cpuid); printk(KERN_INFO "CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n", cpuid, cpu_topology[cpuid].thread_id, Loading