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Commit f3796c0d authored by Junjie Wu's avatar Junjie Wu
Browse files

clock-plutonium: Add reset support for some clocks 



Add bcr_reg for gcc_usb_hs_system_clk and camss_micro_ahb_clk to
enable clk_reset() for drivers.

Change-Id: I6b21a2e1e826439735d0e9f5446316e9b1e9a9e8
Signed-off-by: default avatarJunjie Wu <junjiew@codeaurora.org>
parent 2b979b24

drivers/clk/qcom/clock-gcc-plutonium.c

+2 −0
Original line number Diff line number Diff line
@@ -77,6 +77,7 @@ static DEFINE_VDD_REGULATORS(vdd_dig, VDD_DIG_NUM, 1, vdd_corner, NULL); 
#define USB3_PHY_AUX_CBCR                                (0x1408)

#define USB3_PHY_PIPE_CBCR                               (0x140C)

#define USB3_PHY_AUX_CMD_RCGR                            (0x1414)

#define USB_HS_BCR                                       (0x0480)

#define USB_HS_SYSTEM_CBCR                               (0x0484)

#define USB_HS_AHB_CBCR                                  (0x0488)

#define USB_HS_SYSTEM_CMD_RCGR                           (0x0490)
@@ -2257,6 +2258,7 @@ static struct branch_clk gcc_usb_hs_ahb_clk = { 


static struct branch_clk gcc_usb_hs_system_clk = {

	.cbcr_reg = USB_HS_SYSTEM_CBCR,

	.bcr_reg = USB_HS_BCR,

	.has_sibling = 0,

	.base = &virt_base,

	.c = {

drivers/clk/qcom/clock-mmss-plutonium.c

+2 −0
Original line number Diff line number Diff line
@@ -146,6 +146,7 @@ static DEFINE_VDD_REGULATORS(vdd_dig, VDD_DIG_NUM, 1, vdd_corner, NULL); 
#define CAMSS_GP1_CBCR                                   (0x3474)

#define CAMSS_TOP_AHB_CBCR                               (0x3484)

#define CAMSS_AHB_CBCR                                   (0x348C)

#define CAMSS_MICRO_BCR                                  (0x3490)

#define CAMSS_MICRO_AHB_CBCR                             (0x3494)

#define JPEG0_CMD_RCGR                                   (0x3500)

#define JPEG1_CMD_RCGR                                   (0x3520)
@@ -1478,6 +1479,7 @@ static struct branch_clk camss_mclk3_clk = { 


static struct branch_clk camss_micro_ahb_clk = {

	.cbcr_reg = CAMSS_MICRO_AHB_CBCR,

	.bcr_reg = CAMSS_MICRO_BCR,

	.has_sibling = 1,

	.base = &virt_base,

	.c = {