Loading arch/arm/mach-msm/clock-8226.c +14 −6 Original line number Diff line number Diff line Loading @@ -238,12 +238,6 @@ DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(cxo_a0_pin, cxo_a0_a_pin, A0_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(cxo_a1_pin, cxo_a1_a_pin, A1_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(cxo_a2_pin, cxo_a2_a_pin, A2_ID); struct measure_mux_entry { struct clk *c; int base; u32 debug_mux; }; static struct branch_clk oxilicx_axi_clk; #define MSS_DEBUG_CLOCK_CTL 0x0078 Loading Loading @@ -1559,6 +1553,13 @@ static struct branch_clk gcc_usb_hsic_system_clk = { }, }; #ifdef CONFIG_DEBUG_FS struct measure_mux_entry { struct clk *c; int base; u32 debug_mux; }; static struct measure_mux_entry measure_mux_GCC[] = { { &gcc_mss_cfg_ahb_clk.c, GCC_BASE, 0x0030 }, { &gcc_mss_q6_bimc_axi_clk.c, GCC_BASE, 0x0031 }, Loading Loading @@ -1614,6 +1615,7 @@ static struct measure_mux_entry measure_mux_GCC[] = { { &bimc_clk.c, GCC_BASE, 0x155}, { &dummy_clk, N_BASES, 0x0000}, }; #endif /* CONFIG_DEBUG_FS */ static struct pll_vote_clk mmpll0_pll = { .en_reg = (void __iomem *)MMSS_PLL_VOTE_APCS, Loading Loading @@ -2624,6 +2626,7 @@ static struct branch_clk venus0_vcodec0_clk = { }, }; #ifdef CONFIG_DEBUG_FS static struct measure_mux_entry measure_mux_MMSS[] = { { &mmss_mmssnoc_bto_ahb_clk.c, MMSS_BASE, 0x0002 }, { &mmss_misc_ahb_clk.c, MMSS_BASE, 0x0003 }, Loading Loading @@ -2676,6 +2679,7 @@ static struct measure_mux_entry measure_mux_MMSS[] = { { &mmssnoc_ahb_clk.c, MMSS_BASE, 0x0001 }, {&dummy_clk, N_BASES, 0x0000}, }; #endif /* CONFIG_DEBUG_FS */ static struct branch_clk q6ss_ahb_lfabif_clk = { .cbcr_reg = Q6SS_AHB_LFABIF_CBCR, Loading Loading @@ -2711,12 +2715,14 @@ static struct branch_clk q6ss_xo_clk = { }, }; #ifdef CONFIG_DEBUG_FS static struct measure_mux_entry measure_mux_LPASS[] = { { &q6ss_ahbm_clk.c, LPASS_BASE, 0x001d }, { &q6ss_ahb_lfabif_clk.c, LPASS_BASE, 0x001e }, { &q6ss_xo_clk.c, LPASS_BASE, 0x002b }, {&dummy_clk, N_BASES, 0x0000}, }; #endif /* CONFIG_DEBUG_FS */ static DEFINE_CLK_MEASURE(apc0_m_clk); Loading @@ -2725,6 +2731,7 @@ static DEFINE_CLK_MEASURE(apc2_m_clk); static DEFINE_CLK_MEASURE(apc3_m_clk); static DEFINE_CLK_MEASURE(l2_m_clk); #ifdef CONFIG_DEBUG_FS static struct measure_mux_entry measure_mux_APSS[] = { {&apc0_m_clk, APCS_BASE, 0x00010}, {&apc1_m_clk, APCS_BASE, 0x00114}, Loading @@ -2733,6 +2740,7 @@ static struct measure_mux_entry measure_mux_APSS[] = { {&l2_m_clk, APCS_BASE, 0x01000}, {&dummy_clk, N_BASES, 0x0000} }; #endif /* CONFIG_DEBUG_FS */ #define APCS_SH_PLL_MODE (0x000) #define APCS_SH_PLL_L_VAL (0x004) Loading arch/arm/mach-msm/include/mach/clk-provider.h +1 −1 Original line number Diff line number Diff line Loading @@ -49,7 +49,7 @@ struct clk_register_data { #ifdef CONFIG_DEBUG_FS void clk_debug_print_hw(struct clk *clk, struct seq_file *f); #else static inline void clock_debug_print_hw(struct clk *clk, struct seq_file *f) {} static inline void clk_debug_print_hw(struct clk *clk, struct seq_file *f) {} #endif #define CLK_WARN(clk, cond, fmt, ...) do { \ Loading Loading
arch/arm/mach-msm/clock-8226.c +14 −6 Original line number Diff line number Diff line Loading @@ -238,12 +238,6 @@ DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(cxo_a0_pin, cxo_a0_a_pin, A0_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(cxo_a1_pin, cxo_a1_a_pin, A1_ID); DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(cxo_a2_pin, cxo_a2_a_pin, A2_ID); struct measure_mux_entry { struct clk *c; int base; u32 debug_mux; }; static struct branch_clk oxilicx_axi_clk; #define MSS_DEBUG_CLOCK_CTL 0x0078 Loading Loading @@ -1559,6 +1553,13 @@ static struct branch_clk gcc_usb_hsic_system_clk = { }, }; #ifdef CONFIG_DEBUG_FS struct measure_mux_entry { struct clk *c; int base; u32 debug_mux; }; static struct measure_mux_entry measure_mux_GCC[] = { { &gcc_mss_cfg_ahb_clk.c, GCC_BASE, 0x0030 }, { &gcc_mss_q6_bimc_axi_clk.c, GCC_BASE, 0x0031 }, Loading Loading @@ -1614,6 +1615,7 @@ static struct measure_mux_entry measure_mux_GCC[] = { { &bimc_clk.c, GCC_BASE, 0x155}, { &dummy_clk, N_BASES, 0x0000}, }; #endif /* CONFIG_DEBUG_FS */ static struct pll_vote_clk mmpll0_pll = { .en_reg = (void __iomem *)MMSS_PLL_VOTE_APCS, Loading Loading @@ -2624,6 +2626,7 @@ static struct branch_clk venus0_vcodec0_clk = { }, }; #ifdef CONFIG_DEBUG_FS static struct measure_mux_entry measure_mux_MMSS[] = { { &mmss_mmssnoc_bto_ahb_clk.c, MMSS_BASE, 0x0002 }, { &mmss_misc_ahb_clk.c, MMSS_BASE, 0x0003 }, Loading Loading @@ -2676,6 +2679,7 @@ static struct measure_mux_entry measure_mux_MMSS[] = { { &mmssnoc_ahb_clk.c, MMSS_BASE, 0x0001 }, {&dummy_clk, N_BASES, 0x0000}, }; #endif /* CONFIG_DEBUG_FS */ static struct branch_clk q6ss_ahb_lfabif_clk = { .cbcr_reg = Q6SS_AHB_LFABIF_CBCR, Loading Loading @@ -2711,12 +2715,14 @@ static struct branch_clk q6ss_xo_clk = { }, }; #ifdef CONFIG_DEBUG_FS static struct measure_mux_entry measure_mux_LPASS[] = { { &q6ss_ahbm_clk.c, LPASS_BASE, 0x001d }, { &q6ss_ahb_lfabif_clk.c, LPASS_BASE, 0x001e }, { &q6ss_xo_clk.c, LPASS_BASE, 0x002b }, {&dummy_clk, N_BASES, 0x0000}, }; #endif /* CONFIG_DEBUG_FS */ static DEFINE_CLK_MEASURE(apc0_m_clk); Loading @@ -2725,6 +2731,7 @@ static DEFINE_CLK_MEASURE(apc2_m_clk); static DEFINE_CLK_MEASURE(apc3_m_clk); static DEFINE_CLK_MEASURE(l2_m_clk); #ifdef CONFIG_DEBUG_FS static struct measure_mux_entry measure_mux_APSS[] = { {&apc0_m_clk, APCS_BASE, 0x00010}, {&apc1_m_clk, APCS_BASE, 0x00114}, Loading @@ -2733,6 +2740,7 @@ static struct measure_mux_entry measure_mux_APSS[] = { {&l2_m_clk, APCS_BASE, 0x01000}, {&dummy_clk, N_BASES, 0x0000} }; #endif /* CONFIG_DEBUG_FS */ #define APCS_SH_PLL_MODE (0x000) #define APCS_SH_PLL_L_VAL (0x004) Loading
arch/arm/mach-msm/include/mach/clk-provider.h +1 −1 Original line number Diff line number Diff line Loading @@ -49,7 +49,7 @@ struct clk_register_data { #ifdef CONFIG_DEBUG_FS void clk_debug_print_hw(struct clk *clk, struct seq_file *f); #else static inline void clock_debug_print_hw(struct clk *clk, struct seq_file *f) {} static inline void clk_debug_print_hw(struct clk *clk, struct seq_file *f) {} #endif #define CLK_WARN(clk, cond, fmt, ...) do { \ Loading