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Commit e6cc629a authored by Taniya Das's avatar Taniya Das Committed by Gerrit - the friendly Code Review server
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clk: qcom: clock-rpm: Remove rf_clk1 clocks for MSM8936 and MSM8916 



RF_CLK1 xo clock will not be used by any APSS client, so remove the
instance to avoid any misconfiguration.

CRs-Fixed: 769692
Change-Id: Ifecfa425b6b24cc9429fd8dd0d1cef1de7cf7969
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent ffdd7a0f

drivers/clk/qcom/clock-rpm-8916.c

+0 −5
Original line number Diff line number Diff line
@@ -48,7 +48,6 @@ 
/* XO clock */

#define BB_CLK1_ID		1

#define BB_CLK2_ID		2

#define RF_CLK1_ID		4

#define RF_CLK2_ID		5



static void __iomem *virt_base;
@@ -66,12 +65,10 @@ DEFINE_CLK_RPM_SMD_QDSS(qdss_clk, qdss_a_clk, RPM_MISC_CLK_TYPE, QDSS_ID); 
/* SMD_XO_BUFFER */

DEFINE_CLK_RPM_SMD_XO_BUFFER(bb_clk1, bb_clk1_a, BB_CLK1_ID);

DEFINE_CLK_RPM_SMD_XO_BUFFER(bb_clk2, bb_clk2_a, BB_CLK2_ID);

DEFINE_CLK_RPM_SMD_XO_BUFFER(rf_clk1, rf_clk1_a, RF_CLK1_ID);

DEFINE_CLK_RPM_SMD_XO_BUFFER(rf_clk2, rf_clk2_a, RF_CLK2_ID);



DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(bb_clk1_pin, bb_clk1_a_pin, BB_CLK1_ID);

DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(bb_clk2_pin, bb_clk2_a_pin, BB_CLK2_ID);

DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(rf_clk1_pin, rf_clk1_a_pin, RF_CLK1_ID);

DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(rf_clk2_pin, rf_clk2_a_pin, RF_CLK2_ID);



/* Voter clocks */
@@ -158,12 +155,10 @@ static struct clk_lookup msm_clocks_rpm[] = { 


	CLK_LIST(bb_clk1),

	CLK_LIST(bb_clk2),

	CLK_LIST(rf_clk1),

	CLK_LIST(rf_clk2),



	CLK_LIST(bb_clk1_pin),

	CLK_LIST(bb_clk2_pin),

	CLK_LIST(rf_clk1_pin),

	CLK_LIST(rf_clk2_pin),



	/* RPM debug Mux*/

drivers/clk/qcom/clock-rpm-8936.c

+0 −7
Original line number Diff line number Diff line
@@ -49,7 +49,6 @@ 
/* XO clock */

#define BB_CLK1_ID		1

#define BB_CLK2_ID		2

#define RF_CLK1_ID		4

#define RF_CLK2_ID		5



static void __iomem *virt_base;
@@ -69,12 +68,10 @@ DEFINE_CLK_RPM_SMD_QDSS(qdss_clk, qdss_a_clk, RPM_MISC_CLK_TYPE, QDSS_ID); 
/* SMD_XO_BUFFER */

DEFINE_CLK_RPM_SMD_XO_BUFFER(bb_clk1, bb_clk1_a, BB_CLK1_ID);

DEFINE_CLK_RPM_SMD_XO_BUFFER(bb_clk2, bb_clk2_a, BB_CLK2_ID);

DEFINE_CLK_RPM_SMD_XO_BUFFER(rf_clk1, rf_clk1_a, RF_CLK1_ID);

DEFINE_CLK_RPM_SMD_XO_BUFFER(rf_clk2, rf_clk2_a, RF_CLK2_ID);



DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(bb_clk1_pin, bb_clk1_a_pin, BB_CLK1_ID);

DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(bb_clk2_pin, bb_clk2_a_pin, BB_CLK2_ID);

DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(rf_clk1_pin, rf_clk1_a_pin, RF_CLK1_ID);

DEFINE_CLK_RPM_SMD_XO_BUFFER_PINCTRL(rf_clk2_pin, rf_clk2_a_pin, RF_CLK2_ID);



/* Voter clocks */
@@ -166,8 +163,6 @@ static struct clk_lookup msm_clocks_rpm[] = { 
	CLK_LIST(bb_clk1_a),

	CLK_LIST(bb_clk2),

	CLK_LIST(bb_clk2_a),

	CLK_LIST(rf_clk1),

	CLK_LIST(rf_clk1_a),

	CLK_LIST(rf_clk2),

	CLK_LIST(rf_clk2_a),
@@ -175,8 +170,6 @@ static struct clk_lookup msm_clocks_rpm[] = { 
	CLK_LIST(bb_clk1_a_pin),

	CLK_LIST(bb_clk2_pin),

	CLK_LIST(bb_clk2_a_pin),

	CLK_LIST(rf_clk1_pin),

	CLK_LIST(rf_clk1_a_pin),

	CLK_LIST(rf_clk2_pin),

	CLK_LIST(rf_clk2_a_pin),