Loading arch/arm/mach-msm/pil-q6v5.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -272,7 +272,7 @@ struct q6v5_data *pil_q6v5_init(struct platform_device *pdev) return ERR_CAST(drv->vreg_cx); return ERR_CAST(drv->vreg_cx); drv->vreg_pll = devm_regulator_get(&pdev->dev, "vdd_pll"); drv->vreg_pll = devm_regulator_get(&pdev->dev, "vdd_pll"); if (!IS_ERR(drv->vreg_pll)) { if (!IS_ERR_OR_NULL(drv->vreg_pll)) { int voltage; int voltage; ret = of_property_read_u32(pdev->dev.of_node, "qcom,vdd_pll", ret = of_property_read_u32(pdev->dev.of_node, "qcom,vdd_pll", &voltage); &voltage); Loading Loading
arch/arm/mach-msm/pil-q6v5.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -272,7 +272,7 @@ struct q6v5_data *pil_q6v5_init(struct platform_device *pdev) return ERR_CAST(drv->vreg_cx); return ERR_CAST(drv->vreg_cx); drv->vreg_pll = devm_regulator_get(&pdev->dev, "vdd_pll"); drv->vreg_pll = devm_regulator_get(&pdev->dev, "vdd_pll"); if (!IS_ERR(drv->vreg_pll)) { if (!IS_ERR_OR_NULL(drv->vreg_pll)) { int voltage; int voltage; ret = of_property_read_u32(pdev->dev.of_node, "qcom,vdd_pll", ret = of_property_read_u32(pdev->dev.of_node, "qcom,vdd_pll", &voltage); &voltage); Loading