Loading drivers/video/msm/mdss/mdss_dsi.c +12 −4 Original line number Diff line number Diff line Loading @@ -575,11 +575,19 @@ int mdss_dsi_on(struct mdss_panel_data *pdata) } /* * Enable DSI clocks. * This is also enable the DSI core power block and reset/setup * DSI phy * Enable DSI bus clocks prior to resetting and initializing DSI * Phy. Phy and ctrl setup need to be done before enabling the link * clocks. */ mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1); mdss_dsi_clk_ctrl(ctrl_pdata, DSI_BUS_CLKS, 1); if (!pdata->panel_info.ulps_suspend_enabled) { mdss_dsi_phy_sw_reset(ctrl_pdata); mdss_dsi_phy_init(ctrl_pdata); mdss_dsi_ctrl_setup(ctrl_pdata); } /* DSI link clocks need to be on prior to ctrl sw reset */ mdss_dsi_clk_ctrl(ctrl_pdata, DSI_LINK_CLKS, 1); mdss_dsi_sw_reset(ctrl_pdata, true); /* Loading drivers/video/msm/mdss/mdss_dsi.h +2 −0 Original line number Diff line number Diff line Loading @@ -454,6 +454,8 @@ void mdss_dsi_cmd_test_pattern(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_video_test_pattern(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_panel_pwm_cfg(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_ctrl_phy_restore(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_phy_sw_reset(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_phy_init(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_ctrl_init(struct device *ctrl_dev, struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_cmd_mdp_busy(struct mdss_dsi_ctrl_pdata *ctrl); Loading drivers/video/msm/mdss/msm_mdss_io_8974.c +5 −15 Original line number Diff line number Diff line Loading @@ -26,7 +26,7 @@ static struct dsi_clk_desc dsi_pclk; static void mdss_dsi_phy_sw_reset(struct mdss_dsi_ctrl_pdata *ctrl) void mdss_dsi_phy_sw_reset(struct mdss_dsi_ctrl_pdata *ctrl) { u32 ctrl_rev; if (ctrl == NULL) { Loading Loading @@ -341,7 +341,7 @@ static void mdss_dsi_20nm_phy_init(struct mdss_dsi_ctrl_pdata *ctrl_pdata) } static void mdss_dsi_phy_init(struct mdss_dsi_ctrl_pdata *ctrl) void mdss_dsi_phy_init(struct mdss_dsi_ctrl_pdata *ctrl) { u32 ctrl_rev; Loading Loading @@ -1225,20 +1225,10 @@ static int mdss_dsi_core_power_ctrl(struct mdss_dsi_ctrl_pdata *ctrl, } /* * Phy software reset should not be done for: * 1.) Idle screen power collapse use-case. Issue a phy software * reset only when unblanking the panel in this case. * 2.) When ULPS during suspend is enabled. * Phy and controller setup is needed if coming out of idle * power collapse with clamps enabled. */ if (pdata->panel_info.blank_state == MDSS_PANEL_BLANK_BLANK && !pdata->panel_info.ulps_suspend_enabled) mdss_dsi_phy_sw_reset(ctrl); /* * Phy and controller setup need not be done during bootup * when continuous splash screen is enabled. */ if (!pdata->panel_info.cont_splash_enabled) { if (ctrl->mmss_clamp) { mdss_dsi_phy_init(ctrl); mdss_dsi_ctrl_setup(ctrl); } Loading Loading
drivers/video/msm/mdss/mdss_dsi.c +12 −4 Original line number Diff line number Diff line Loading @@ -575,11 +575,19 @@ int mdss_dsi_on(struct mdss_panel_data *pdata) } /* * Enable DSI clocks. * This is also enable the DSI core power block and reset/setup * DSI phy * Enable DSI bus clocks prior to resetting and initializing DSI * Phy. Phy and ctrl setup need to be done before enabling the link * clocks. */ mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1); mdss_dsi_clk_ctrl(ctrl_pdata, DSI_BUS_CLKS, 1); if (!pdata->panel_info.ulps_suspend_enabled) { mdss_dsi_phy_sw_reset(ctrl_pdata); mdss_dsi_phy_init(ctrl_pdata); mdss_dsi_ctrl_setup(ctrl_pdata); } /* DSI link clocks need to be on prior to ctrl sw reset */ mdss_dsi_clk_ctrl(ctrl_pdata, DSI_LINK_CLKS, 1); mdss_dsi_sw_reset(ctrl_pdata, true); /* Loading
drivers/video/msm/mdss/mdss_dsi.h +2 −0 Original line number Diff line number Diff line Loading @@ -454,6 +454,8 @@ void mdss_dsi_cmd_test_pattern(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_video_test_pattern(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_panel_pwm_cfg(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_ctrl_phy_restore(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_phy_sw_reset(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_phy_init(struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_ctrl_init(struct device *ctrl_dev, struct mdss_dsi_ctrl_pdata *ctrl); void mdss_dsi_cmd_mdp_busy(struct mdss_dsi_ctrl_pdata *ctrl); Loading
drivers/video/msm/mdss/msm_mdss_io_8974.c +5 −15 Original line number Diff line number Diff line Loading @@ -26,7 +26,7 @@ static struct dsi_clk_desc dsi_pclk; static void mdss_dsi_phy_sw_reset(struct mdss_dsi_ctrl_pdata *ctrl) void mdss_dsi_phy_sw_reset(struct mdss_dsi_ctrl_pdata *ctrl) { u32 ctrl_rev; if (ctrl == NULL) { Loading Loading @@ -341,7 +341,7 @@ static void mdss_dsi_20nm_phy_init(struct mdss_dsi_ctrl_pdata *ctrl_pdata) } static void mdss_dsi_phy_init(struct mdss_dsi_ctrl_pdata *ctrl) void mdss_dsi_phy_init(struct mdss_dsi_ctrl_pdata *ctrl) { u32 ctrl_rev; Loading Loading @@ -1225,20 +1225,10 @@ static int mdss_dsi_core_power_ctrl(struct mdss_dsi_ctrl_pdata *ctrl, } /* * Phy software reset should not be done for: * 1.) Idle screen power collapse use-case. Issue a phy software * reset only when unblanking the panel in this case. * 2.) When ULPS during suspend is enabled. * Phy and controller setup is needed if coming out of idle * power collapse with clamps enabled. */ if (pdata->panel_info.blank_state == MDSS_PANEL_BLANK_BLANK && !pdata->panel_info.ulps_suspend_enabled) mdss_dsi_phy_sw_reset(ctrl); /* * Phy and controller setup need not be done during bootup * when continuous splash screen is enabled. */ if (!pdata->panel_info.cont_splash_enabled) { if (ctrl->mmss_clamp) { mdss_dsi_phy_init(ctrl); mdss_dsi_ctrl_setup(ctrl); } Loading